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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [cpu/] [or1k/] - Rev 1576

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1576 configure updates phoenix 6861d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1557 Fix most warnings issued by gcc4 nogj 6884d 19h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1555 * Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell.
* Changed code to use log2_int() instead of log2(), which is also a builtin
library function (fixes compile on gcc4).
* Moved is_power2() from sim-config.c to misc.c.
nogj 6884d 19h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1551 Remove the pcprev global nogj 6946d 08h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1550 * prototype() -> prototype(void) where appropriate.
* Use `static' where it can be used.
nogj 6946d 08h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1549 Spelling fixes nogj 6946d 08h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1540 * Breakup the tick_job function into smaller ones.
* Fix lots of conner cases.
* Add tests for the tick timer.
nogj 6946d 08h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1532 Add pretty spr dumping code nogj 6950d 08h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1531 Remove non-trigerable out-of-range checks nogj 6950d 08h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1529 * The effective address as written to the I/DCBPR registers needs to be translated by the respective mmu.
* Don't treat any values as special in the handling of DCPBR, DCBFR, DCBIR, ICBPR and ICBIR.
nogj 6951d 10h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1525 Rename ADDR_PAGE to IADDR_PAGE nogj 6951d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1513 Remove the flag global nogj 6951d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1511 Fix typo nogj 6951d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1510 Create a seporate debug channel to dump exceptions to nogj 6951d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1509 Remove 08 prefix from PRIdREG nogj 6951d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6951d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.
nogj 6951d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.
nogj 6994d 17h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1481 Remove the useless cross reference stuff: it was a bad idea to begin with nogj 7015d 09h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1473 Add warning that except_handle may not return nogj 7042d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7042d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1452 Implement a dynamic recompiler to speed up the execution nogj 7042d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1446 Cosmetic fixes nogj 7042d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1444 Move the definitions needed for the simple execution model out of or32.h and into simpl32_defs.h nogj 7042d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1442 Replace some problematic calles to mfspr/mtspr with direct access to the spr nogj 7042d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7042d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1404 Move the function of ic_clock() to mtspr() and remove it nogj 7042d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1402 Do what dc_clock() did in mtspr() and remove it nogj 7042d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1386 Rework exception handling nogj 7048d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.
nogj 7057d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/

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