OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc3/] - Rev 1366

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1366 Pass a caller given pointer to the vapi_read callback nogj 7087d 23h /or1k/tags/rel-0-3-0-rc3/
1365 Pass a pointer as the user given argument in the schedular callback nogj 7087d 23h /or1k/tags/rel-0-3-0-rc3/
1364 Clean up the ata peripheral useing the new set of callbacks nogj 7087d 23h /or1k/tags/rel-0-3-0-rc3/
1363 Add status callback nogj 7087d 23h /or1k/tags/rel-0-3-0-rc3/
1362 initialise dev_mem->chip_select in register_memory nogj 7087d 23h /or1k/tags/rel-0-3-0-rc3/
1361 Cleanup test peripheral nogj 7087d 23h /or1k/tags/rel-0-3-0-rc3/
1360 Add dynamic hooks to sim_reset nogj 7087d 23h /or1k/tags/rel-0-3-0-rc3/
1359 Pass private data in readfunc/writefunc callbacks nogj 7087d 23h /or1k/tags/rel-0-3-0-rc3/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7087d 23h /or1k/tags/rel-0-3-0-rc3/
1355 Fix dmatest testcase nogj 7095d 09h /or1k/tags/rel-0-3-0-rc3/
1354 typing fixes phoenix 7096d 05h /or1k/tags/rel-0-3-0-rc3/
1353 Modularise simulator command parsing nogj 7097d 01h /or1k/tags/rel-0-3-0-rc3/
1352 Optimise execution history tracking nogj 7097d 01h /or1k/tags/rel-0-3-0-rc3/
1351 Reindent create_watchpoints useing a more compact indentation style nogj 7097d 02h /or1k/tags/rel-0-3-0-rc3/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7097d 02h /or1k/tags/rel-0-3-0-rc3/
1349 Works with GDB jcastillo 7099d 02h /or1k/tags/rel-0-3-0-rc3/
1348 Converted to current simulator configuration format jcastillo 7102d 07h /or1k/tags/rel-0-3-0-rc3/
1347 Remove backup file nogj 7108d 13h /or1k/tags/rel-0-3-0-rc3/
1346 Remove the global op structure nogj 7110d 05h /or1k/tags/rel-0-3-0-rc3/
1345 Fix out-of-tree builds nogj 7110d 05h /or1k/tags/rel-0-3-0-rc3/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7110d 06h /or1k/tags/rel-0-3-0-rc3/
1343 * Fix warnings in insnset.c and execute.c nogj 7110d 06h /or1k/tags/rel-0-3-0-rc3/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7110d 06h /or1k/tags/rel-0-3-0-rc3/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7110d 06h /or1k/tags/rel-0-3-0-rc3/
1339 revert to the old l.sfxxi behavior phoenix 7124d 08h /or1k/tags/rel-0-3-0-rc3/
1338 l.ff1 instruction added andreje 7126d 04h /or1k/tags/rel-0-3-0-rc3/
1337 du_hwbkpt disabled when debug unit not implemented andreje 7130d 10h /or1k/tags/rel-0-3-0-rc3/
1336 sign/zero extension for l.sfxxi instructions corrected andreje 7130d 10h /or1k/tags/rel-0-3-0-rc3/
1335 flag for l.cmov instruction added andreje 7130d 10h /or1k/tags/rel-0-3-0-rc3/
1334 l.ff1 and l.cmov instructions added andreje 7130d 10h /or1k/tags/rel-0-3-0-rc3/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.