OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc3/] - Rev 55

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
55 Added 'dv' command for dumping memory as verilog model. lampret 8730d 10h /or1k/tags/rel-0-3-0-rc3/
54 Regular maintenance. lampret 8730d 10h /or1k/tags/rel-0-3-0-rc3/
53 Added setjmp/longjmp. lampret 8735d 10h /or1k/tags/rel-0-3-0-rc3/
52 Comment character changed. lampret 8791d 06h /or1k/tags/rel-0-3-0-rc3/
51 Exception detection changed a bit. lampret 8791d 06h /or1k/tags/rel-0-3-0-rc3/
50 Added CURINSN macro. lampret 8791d 06h /or1k/tags/rel-0-3-0-rc3/
49 Changed simulation mode to non-virtual (real). lampret 8791d 06h /or1k/tags/rel-0-3-0-rc3/
48 Added CCR. lampret 8791d 06h /or1k/tags/rel-0-3-0-rc3/
47 Added interrupt recognition and better memory dump. lampret 8791d 06h /or1k/tags/rel-0-3-0-rc3/
46 Added srand(). lampret 8791d 06h /or1k/tags/rel-0-3-0-rc3/
45 Added NONE. lampret 8791d 06h /or1k/tags/rel-0-3-0-rc3/
44 %s bug fixed. lampret 8796d 11h /or1k/tags/rel-0-3-0-rc3/
43 SUPV bit from SR is now saved into EPCR bit 0. lampret 8801d 14h /or1k/tags/rel-0-3-0-rc3/
42 Bug fix. Only symbols with names shorter than 9 characters are loaded. lampret 8801d 14h /or1k/tags/rel-0-3-0-rc3/
41 Bug fix. Now all COFF sections are loaded not just .text. lampret 8802d 12h /or1k/tags/rel-0-3-0-rc3/
40 This commit was generated by cvs2svn to compensate for changes in r39, which
included commits to RCS files with non-trunk default branches.
lampret 8802d 16h /or1k/tags/rel-0-3-0-rc3/
38 Virtual machine at the moment. lampret 8802d 17h /or1k/tags/rel-0-3-0-rc3/
37 STACK_SIZE is not properly used (will be removed soon). lampret 8802d 17h /or1k/tags/rel-0-3-0-rc3/
36 Fixed bug when loading "data" from .text segment (all insns are not only
decoded but also placed in simulator memory undecoded as data).
lampret 8802d 17h /or1k/tags/rel-0-3-0-rc3/
35 SLP hooks. lampret 8802d 17h /or1k/tags/rel-0-3-0-rc3/
34 Started with SLP (not finished yet). lampret 8802d 17h /or1k/tags/rel-0-3-0-rc3/
33 Handling of or1k exceptions. lampret 8806d 16h /or1k/tags/rel-0-3-0-rc3/
32 Interrupt recognition. lampret 8806d 16h /or1k/tags/rel-0-3-0-rc3/
31 16450 serial UART device. lampret 8806d 19h /or1k/tags/rel-0-3-0-rc3/
30 Updated SPRs, exceptions. Added 16450 device. lampret 8806d 19h /or1k/tags/rel-0-3-0-rc3/
29 Adding OR16/OR32 insn decoder. lampret 8821d 16h /or1k/tags/rel-0-3-0-rc3/
28 Adding COFF loader. lampret 8821d 16h /or1k/tags/rel-0-3-0-rc3/
27 Updated. lampret 8836d 20h /or1k/tags/rel-0-3-0-rc3/
26 Clean up. lampret 8837d 13h /or1k/tags/rel-0-3-0-rc3/
25 Bug fix in handling labels when loading code into simulator memory. lampret 8837d 13h /or1k/tags/rel-0-3-0-rc3/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.