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[/] [or1k/] [tags/] [rel-0-3-0-rc3/] [or1ksim/] [bpb/] - Rev 1358

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1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7087d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7096d 20h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7110d 00h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
1308 Gyorgy Jeney: extensive cleanup phoenix 7301d 14h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
1249 Downgrading back to automake-1.4 lampret 7466d 14h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
1243 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7468d 23h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
1117 Ignore generated files for CVS purposes sfurman 7809d 15h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
1097 Cache invalidate bug fixed. simons 7896d 16h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
997 PRINTF should be used instead of printf; command redirection repaired markom 7998d 05h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
970 Testbench is now running on ORP architecture platform. simons 8005d 16h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
876 Beta release of ATA simulation rherveille 8049d 15h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8225d 00h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
517 some performance optimizations markom 8229d 00h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
500 Added .cvsignore files for annoying generated files erez 8231d 03h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
306 corrected lots of bugs markom 8286d 04h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
264 updated cpu config section; added sim config section markom 8291d 23h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8301d 03h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8460d 09h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
54 Regular maintenance. lampret 8730d 06h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
28 Adding COFF loader. lampret 8821d 13h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
26 Clean up. lampret 8837d 10h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
18 or16 added, or1k renamed to or32. lampret 8840d 05h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
13 Rebuild of the generated files. jrydberg 8900d 22h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
7 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8900d 22h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 8901d 16h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.		 cvs 9027d 10h /or1k/tags/rel-0-3-0-rc3/or1ksim/bpb/

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