OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc3/] [or1ksim/] [support/] - Rev 1408

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1408 Make the tick timer use the new debug functions nogj 7076d 22h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1398 Correct incorrect calls to eval_direct8 nogj 7076d 22h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1392 Make uart use the new trace functions nogj 7076d 22h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1390 * Change scheduler to count down to 0 instead of reaching a certain cycle
count.
* Change the SCHED_ADD interface to take a time out as the parameter instead of the number of cycles.
nogj 7076d 22h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1389 Implement debug channels based on the wine debugging scheme nogj 7083d 01h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1376 aclocal && autoconf && automake phoenix 7111d 01h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1365 Pass a pointer as the user given argument in the schedular callback nogj 7117d 16h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7117d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7126d 20h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7140d 00h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7243d 15h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1315 missing declaration when defined STACK_ARGS phoenix 7261d 12h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1308 Gyorgy Jeney: extensive cleanup phoenix 7331d 14h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1265 simprintf now uses stack vargs -- same as printf markom 7446d 22h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1249 Downgrading back to automake-1.4 lampret 7496d 14h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1117 Ignore generated files for CVS purposes sfurman 7839d 14h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
1095 eval_reg replaced with the new evalsim_reg32 lampret 7933d 10h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
997 PRINTF should be used instead of printf; command redirection repaired markom 8028d 05h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
970 Testbench is now running on ORP architecture platform. simons 8035d 16h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
884 code cleaning - a lot of global variables moved to runtime struct markom 8072d 03h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
876 Beta release of ATA simulation rherveille 8079d 15h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
823 Added configuration parameter for specifying stdout file filename. ivang 8155d 23h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
821 ugly bug with duplicate redefined i removed markom 8157d 23h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
807 sched files moved to support dir markom 8163d 06h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
704 exe_logs now print also l.nop 3 printfs markom 8205d 01h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
547 memory profiler added markom 8254d 04h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
532 removed stats 6 command, handling SLP; function profiling is supported by profiler; subroutine level parallelism is not covered yet, but should be done in profiler markom 8256d 05h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
517 some performance optimizations markom 8258d 23h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
515 uart test updated; simprintf updated markom 8259d 03h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/
500 Added .cvsignore files for annoying generated files erez 8261d 03h /or1k/tags/rel-0-3-0-rc3/or1ksim/support/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.