OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc3/] [or1ksim/] [tick/] - Rev 1408

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1408 Make the tick timer use the new debug functions nogj 7076d 11h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
1390 * Change scheduler to count down to 0 instead of reaching a certain cycle
count.
* Change the SCHED_ADD interface to take a time out as the parameter instead of the number of cycles.
nogj 7076d 12h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
1386 Rework exception handling nogj 7082d 15h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
1376 aclocal && autoconf && automake phoenix 7110d 15h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
1365 Pass a pointer as the user given argument in the schedular callback nogj 7117d 06h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7126d 10h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7243d 04h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
1249 Downgrading back to automake-1.4 lampret 7496d 04h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
1117 Ignore generated files for CVS purposes sfurman 7839d 04h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
997 PRINTF should be used instead of printf; command redirection repaired markom 8027d 19h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
970 Testbench is now running on ORP architecture platform. simons 8035d 06h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
884 code cleaning - a lot of global variables moved to runtime struct markom 8071d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
876 Beta release of ATA simulation rherveille 8079d 05h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
802 Cache and tick timer tests fixed. simons 8167d 18h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
728 tick timer works with scheduler markom 8196d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
611 EEAR register is not changed by trap, sys, int, tick and range exception. simons 8239d 19h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8243d 04h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
561 Tick timer is not connected to PIC. simons 8249d 10h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
517 some performance optimizations markom 8258d 13h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
500 Added .cvsignore files for annoying generated files erez 8260d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
333 small bug fixed markom 8311d 19h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
332 removed fixed irq numbering from pic.h; tick timer section added markom 8311d 20h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
259 Removed tick/Makefile, which is generated anyway erez 8323d 10h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
241 "make install" now works markom 8329d 18h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
239 added enviroment configuration script parser markom 8329d 18h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8330d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
189 fixed mode handling for tick facility chris 8378d 21h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed
markom 8407d 13h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
138 - on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading
markom 8454d 18h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/
133 moved header files to match other utilities
repaired l.sra and some other shifting instructions
started build_automata for binary instruction decode
markom 8457d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/tick/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.