OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_12/] [or1200/] - Rev 351

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
351 Fixed some l.trap typos. lampret 8302d 19h /or1k/tags/rel_12/or1200/
350 For GDB changed single stepping and disabled trap exception. lampret 8302d 20h /or1k/tags/rel_12/or1200/
338 Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc) lampret 8307d 19h /or1k/tags/rel_12/or1200/
337 Fixed tick timer interrupt reporting by using TTCR[IP] bit. lampret 8307d 19h /or1k/tags/rel_12/or1200/
328 Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports. lampret 8309d 03h /or1k/tags/rel_12/or1200/
316 Fixed exceptions. lampret 8311d 01h /or1k/tags/rel_12/or1200/
271 Added missing endif lampret 8315d 14h /or1k/tags/rel_12/or1200/
265 Modified virtual silicon instantiations. lampret 8318d 10h /or1k/tags/rel_12/or1200/
220 Fixed parameters in generic sprams. lampret 8329d 09h /or1k/tags/rel_12/or1200/
219 Fixed sensitivity list. lampret 8330d 11h /or1k/tags/rel_12/or1200/
218 Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF. lampret 8330d 11h /or1k/tags/rel_12/or1200/
217 Fixed some synthesis warnings. Configured with caches and MMUs. lampret 8332d 05h /or1k/tags/rel_12/or1200/
216 No longer needed. lampret 8337d 16h /or1k/tags/rel_12/or1200/
215 MP3 version. lampret 8337d 16h /or1k/tags/rel_12/or1200/
210 Updated debug. More cleanup. Added MAC. lampret 8351d 00h /or1k/tags/rel_12/or1200/
209 Update debug. lampret 8353d 05h /or1k/tags/rel_12/or1200/
205 Adding debug capabilities. Half done. lampret 8359d 00h /or1k/tags/rel_12/or1200/
203 Updated from xess branch. lampret 8363d 05h /or1k/tags/rel_12/or1200/
180 Updated debug. lampret 8376d 04h /or1k/tags/rel_12/or1200/
179 Sim run script lampret 8395d 21h /or1k/tags/rel_12/or1200/
178 Some test code lampret 8395d 21h /or1k/tags/rel_12/or1200/
177 Improved wb_sram model lampret 8395d 21h /or1k/tags/rel_12/or1200/
176 IC enable/disable. lampret 8395d 21h /or1k/tags/rel_12/or1200/
172 Removing obsolete files. lampret 8400d 01h /or1k/tags/rel_12/or1200/
171 Added monitor.v and timescale.v lampret 8400d 01h /or1k/tags/rel_12/or1200/
170 Added cfg regs. Moved all defines into one defines.v file. More cleanup. lampret 8400d 01h /or1k/tags/rel_12/or1200/
169 Fixed memory cells. Moved monitor.h into monitor.v lampret 8400d 01h /or1k/tags/rel_12/or1200/
168 Major clean-up. lampret 8403d 15h /or1k/tags/rel_12/or1200/
166 Fixed RAM's oen bug. Cache bypass under development. lampret 8422d 01h /or1k/tags/rel_12/or1200/
165 Added variable ack of WB transfers (see NODELAY_WBx). lampret 8422d 01h /or1k/tags/rel_12/or1200/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.