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[/] [or1k/] [tags/] [rel_15/] - Rev 1148

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Rev Log message Author Age Path
1148 *** empty log message *** phoenix 7743d 21h /or1k/tags/rel_15/
1147 remove unneeded include phoenix 7743d 21h /or1k/tags/rel_15/
1146 cygwin fix phoenix 7743d 21h /or1k/tags/rel_15/
1145 1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine.
sfurman 7743d 21h /or1k/tags/rel_15/
1144 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7746d 03h /or1k/tags/rel_15/
1143 Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. sfurman 7746d 18h /or1k/tags/rel_15/
1142 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7746d 18h /or1k/tags/rel_15/
1141 WB = 1/2 RISC clock test code enabled. lampret 7748d 03h /or1k/tags/rel_15/
1140 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. lampret 7748d 03h /or1k/tags/rel_15/
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7748d 03h /or1k/tags/rel_15/
1138 Added some information how to run simulations. lampret 7748d 22h /or1k/tags/rel_15/
1137 Added RFRAM generic and Altera lpm library. lampret 7748d 22h /or1k/tags/rel_15/
1136 Add altera lpm library. lampret 7748d 22h /or1k/tags/rel_15/
1135 Added get_gpr support for OR1200_RFRAM_GENERIC lampret 7748d 22h /or1k/tags/rel_15/
1134 Changed location of debug test code to 0. lampret 7748d 22h /or1k/tags/rel_15/
1133 Adding OR1200_CLMODE_1TO2 test code. lampret 7748d 22h /or1k/tags/rel_15/
1132 RFRAM defines comments updated. Altera LPM option added. lampret 7748d 22h /or1k/tags/rel_15/
1131 Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. lampret 7748d 23h /or1k/tags/rel_15/
1130 RFRAM type always need to be defined. lampret 7748d 23h /or1k/tags/rel_15/
1129 Added Altera LPM RAMs. Changed generic RAM output when OE inactive. lampret 7748d 23h /or1k/tags/rel_15/
1128 Fixed my bustage: Add missing 2nd argument to open(). Otherwise,
opening a serial port channel can sporadically fail.
sfurman 7753d 21h /or1k/tags/rel_15/
1127 Added ability to map I/O from simulated UARTs to physical serial ports
on the host running the simulator.
sfurman 7756d 22h /or1k/tags/rel_15/
1126 Added lengthy comment explaining all possible choices for UART
channels, e.g. xterm, tcp, file, etc.
sfurman 7759d 01h /or1k/tags/rel_15/
1125 This test case passes. lampret 7770d 04h /or1k/tags/rel_15/
1124 Initialize or1k_implementation with reasonable defaults for the number
of implementation registers. This doesn't affect the jtag or sim
targets at all because those values are always overwritten when
or1k_implementation is initialized. However, it is necessary when
connecting to remote gdb stubs through a serial port or socket, since
or1k_implementation is not yet initialized for those targets.
sfurman 7779d 20h /or1k/tags/rel_15/
1123 Renumber/rename SPRs to match latest architecture doc sfurman 7781d 03h /or1k/tags/rel_15/
1122 Get rid of C++ style declarations (which can appear in the middle of a block) in C program. Some older compilers complain. sfurman 7786d 04h /or1k/tags/rel_15/
1121 Ignore generated files sfurman 7786d 04h /or1k/tags/rel_15/
1120 Fix my dumb automake bustage sfurman 7786d 05h /or1k/tags/rel_15/
1119 1) Fix the "channels:xterm" feature so that it functions on linux.
The existing implementation relies on SysV STREAMS behavior that
Linux does not possess.

2) Allow arguments to be passed to the xterm from the sim.cfg file,
e.g. to set the window dimensions or fonts.

3) Add the ability for a program to interact with the simulator UART
through a TCP socket.
sfurman 7787d 00h /or1k/tags/rel_15/

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