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[/] [or1k/] [tags/] [rel_24/] - Rev 1010

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Rev Log message Author Age Path
1010 Import ivang 8011d 10h /or1k/tags/rel_24/
1009 Import ivang 8011d 11h /or1k/tags/rel_24/
1008 Import ivang 8011d 11h /or1k/tags/rel_24/
1007 Import ivang 8011d 11h /or1k/tags/rel_24/
1006 Import ivang 8011d 11h /or1k/tags/rel_24/
1005 Import ivang 8011d 12h /or1k/tags/rel_24/
1004 Now every ramdisk image should have init program. simons 8011d 20h /or1k/tags/rel_24/
1003 cuc temporary files are deleted upon exiting markom 8011d 20h /or1k/tags/rel_24/
1002 Now every ramdisk image should have init program. simons 8011d 20h /or1k/tags/rel_24/
1001 fixed load/store state machine verilog generation errors markom 8011d 20h /or1k/tags/rel_24/
1000 IC/DC cache enable routines fixed. simons 8011d 21h /or1k/tags/rel_24/
999 Now every ramdisk image should have init program. simons 8011d 22h /or1k/tags/rel_24/
998 added missing fout initialization markom 8011d 23h /or1k/tags/rel_24/
997 PRINTF should be used instead of printf; command redirection repaired markom 8012d 00h /or1k/tags/rel_24/
996 some minor bugs fixed markom 8012d 23h /or1k/tags/rel_24/
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 8013d 07h /or1k/tags/rel_24/
993 Fixed IMMU bug. lampret 8013d 07h /or1k/tags/rel_24/
992 A bug when cache enabled and bus error comes fixed. simons 8013d 16h /or1k/tags/rel_24/
991 Different memory controller. simons 8013d 16h /or1k/tags/rel_24/
990 Test is now complete. simons 8013d 16h /or1k/tags/rel_24/
989 c++ is making problems so, for now, it is excluded. simons 8015d 00h /or1k/tags/rel_24/
988 ORP architecture supported. simons 8015d 15h /or1k/tags/rel_24/
987 ORP architecture supported. simons 8015d 23h /or1k/tags/rel_24/
986 outputs out of function are not registered anymore markom 8015d 23h /or1k/tags/rel_24/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8016d 11h /or1k/tags/rel_24/
984 Disable SB until it is tested lampret 8016d 11h /or1k/tags/rel_24/
983 First checkin lampret 8016d 13h /or1k/tags/rel_24/
982 Moved to sim/bin lampret 8016d 13h /or1k/tags/rel_24/
981 First checkin. lampret 8016d 13h /or1k/tags/rel_24/
980 Removed sim.tcl that shouldn't be here. lampret 8016d 13h /or1k/tags/rel_24/

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