Rev |
Log message |
Author |
Age |
Path |
1175 |
Added three missing wire declarations. No functional changes. |
lampret |
7671d 12h |
/or1k/tags/rel_24/ |
1173 |
Added QMEM. |
lampret |
7673d 22h |
/or1k/tags/rel_24/ |
1172 |
Added embedded memory QMEM. |
lampret |
7673d 22h |
/or1k/tags/rel_24/ |
1171 |
Added embedded memory QMEM. |
lampret |
7673d 22h |
/or1k/tags/rel_24/ |
1163 |
This commit was manufactured by cvs2svn to create branch 'branch_qmem'. |
|
7706d 11h |
/or1k/tags/rel_24/ |
1161 |
When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. |
lampret |
7706d 11h |
/or1k/tags/rel_24/ |
1160 |
added missing .rodata.* section into rom linker script |
phoenix |
7737d 11h |
/or1k/tags/rel_24/ |
1159 |
No functional changes. Added defines to disable implementation of multiplier/MAC |
lampret |
7749d 13h |
/or1k/tags/rel_24/ |
1158 |
Added simple uart test case. |
lampret |
7750d 15h |
/or1k/tags/rel_24/ |
1157 |
Added syscall test case. |
lampret |
7750d 15h |
/or1k/tags/rel_24/ |
1156 |
Tick timer test case added. |
lampret |
7751d 11h |
/or1k/tags/rel_24/ |
1155 |
No functional change. Only added customization for exception vectors. |
lampret |
7752d 15h |
/or1k/tags/rel_24/ |
1154 |
When using tty channel, put the serial port into raw mode (no echo, no
CR/LF conversion, no other line discipline/buffering). |
sfurman |
7760d 07h |
/or1k/tags/rel_24/ |
1153 |
When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.
Fix tested w/ both eCos and uclinux. |
sfurman |
7760d 17h |
/or1k/tags/rel_24/ |
1152 |
*** empty log message *** |
phoenix |
7760d 21h |
/or1k/tags/rel_24/ |
1151 |
*** empty log message *** |
phoenix |
7760d 21h |
/or1k/tags/rel_24/ |
1150 |
remove unneded include |
phoenix |
7760d 23h |
/or1k/tags/rel_24/ |
1149 |
*** empty log message *** |
phoenix |
7761d 10h |
/or1k/tags/rel_24/ |
1148 |
*** empty log message *** |
phoenix |
7761d 11h |
/or1k/tags/rel_24/ |
1147 |
remove unneeded include |
phoenix |
7761d 11h |
/or1k/tags/rel_24/ |
1146 |
cygwin fix |
phoenix |
7761d 11h |
/or1k/tags/rel_24/ |
1145 |
1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine. |
sfurman |
7761d 11h |
/or1k/tags/rel_24/ |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7763d 17h |
/or1k/tags/rel_24/ |
1143 |
Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. |
sfurman |
7764d 07h |
/or1k/tags/rel_24/ |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7764d 07h |
/or1k/tags/rel_24/ |
1141 |
WB = 1/2 RISC clock test code enabled. |
lampret |
7765d 17h |
/or1k/tags/rel_24/ |
1140 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. |
lampret |
7765d 17h |
/or1k/tags/rel_24/ |
1139 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. |
lampret |
7765d 17h |
/or1k/tags/rel_24/ |
1138 |
Added some information how to run simulations. |
lampret |
7766d 12h |
/or1k/tags/rel_24/ |
1137 |
Added RFRAM generic and Altera lpm library. |
lampret |
7766d 12h |
/or1k/tags/rel_24/ |