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[/] [or1k/] [tags/] [rel_25/] - Rev 206

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Rev Log message Author Age Path
206 Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC.		 chris 8325d 13h /or1k/tags/rel_25/
205 Adding debug capabilities. Half done. lampret 8329d 16h /or1k/tags/rel_25/
204 Added function prototypes to stop gcc from complaining erez 8332d 08h /or1k/tags/rel_25/
203 Updated from xess branch. lampret 8333d 21h /or1k/tags/rel_25/
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf		 erez 8339d 05h /or1k/tags/rel_25/
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8339d 05h /or1k/tags/rel_25/
200 Initial import simons 8342d 12h /or1k/tags/rel_25/
199 Initial import simons 8342d 14h /or1k/tags/rel_25/
198 Moved from testbench.old simons 8345d 00h /or1k/tags/rel_25/
197 This is not used any more. simons 8345d 01h /or1k/tags/rel_25/
196 Configuration SPRs added. simons 8345d 01h /or1k/tags/rel_25/
195 New test added. simons 8345d 01h /or1k/tags/rel_25/
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.		 chris 8345d 09h /or1k/tags/rel_25/
193 Declared RISCOP.RESET to be volatile so that -O2 optimization would
not optimize away the correct behavior by trying to be too clever.		 chris 8345d 09h /or1k/tags/rel_25/
192 Removed GlobalMode reference causing problems for --disable-debugmod
option.		 chris 8345d 18h /or1k/tags/rel_25/
191 Added UART jitter var to sim config chris 8346d 15h /or1k/tags/rel_25/
190 Added jitter initialization chris 8346d 15h /or1k/tags/rel_25/
189 fixed mode handling for tick facility chris 8346d 15h /or1k/tags/rel_25/
188 fixed PIC interrupt controller chris 8346d 15h /or1k/tags/rel_25/
187 minor change to clear pending exception chris 8346d 15h /or1k/tags/rel_25/
186 major change to UART structure chris 8346d 15h /or1k/tags/rel_25/
185 major change to UART code chris 8346d 15h /or1k/tags/rel_25/
184 modified decode for trace debugging chris 8346d 15h /or1k/tags/rel_25/
183 changed special case for PICSR chris 8346d 15h /or1k/tags/rel_25/
182 updated exception handling procedures chris 8346d 15h /or1k/tags/rel_25/
181 Added trace/stall commands chris 8346d 15h /or1k/tags/rel_25/
180 Updated debug. lampret 8346d 21h /or1k/tags/rel_25/
179 Sim run script lampret 8366d 13h /or1k/tags/rel_25/
178 Some test code lampret 8366d 13h /or1k/tags/rel_25/
177 Improved wb_sram model lampret 8366d 13h /or1k/tags/rel_25/

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