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[/] [or1k/] [tags/] [rel_25/] [or1200/] [rtl/] - Rev 402

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Rev Log message Author Age Path
402 Added OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32 lampret 8258d 11h /or1k/tags/rel_25/or1200/rtl/
401 *** empty log message *** simons 8261d 21h /or1k/tags/rel_25/or1200/rtl/
400 force_dslot_fetch does not work - allways zero. simons 8261d 21h /or1k/tags/rel_25/or1200/rtl/
399 Trap insn couses break after exits ex_insn. simons 8261d 21h /or1k/tags/rel_25/or1200/rtl/
391 Fixed except_stop width and fixed EX PC for 1400444f no-ops. lampret 8264d 17h /or1k/tags/rel_25/or1200/rtl/
390 Changed instantiation name of VS RAMs. lampret 8264d 18h /or1k/tags/rel_25/or1200/rtl/
387 Now FPGA and ASIC target are separate. lampret 8264d 20h /or1k/tags/rel_25/or1200/rtl/
386 Fixed VS RAM instantiation - again. lampret 8264d 20h /or1k/tags/rel_25/or1200/rtl/
370 Program counter divided to PPC and NPC. simons 8268d 18h /or1k/tags/rel_25/or1200/rtl/
367 Changed DSR/DRR behavior and exception detection. lampret 8269d 07h /or1k/tags/rel_25/or1200/rtl/
365 Added wb_cyc_o assignment after it was removed by accident. lampret 8270d 02h /or1k/tags/rel_25/or1200/rtl/
360 Added OR1200_REGISTERED_INPUTS. lampret 8271d 18h /or1k/tags/rel_25/or1200/rtl/
359 Added optional sampling of inputs. lampret 8271d 18h /or1k/tags/rel_25/or1200/rtl/
358 Fixed virtual silicon single-port rams instantiation. lampret 8271d 18h /or1k/tags/rel_25/or1200/rtl/
357 Fixed dbg_is_o assignment width. lampret 8271d 18h /or1k/tags/rel_25/or1200/rtl/
356 Break point bug fixed simons 8271d 21h /or1k/tags/rel_25/or1200/rtl/
354 Fixed width of du_except. lampret 8272d 15h /or1k/tags/rel_25/or1200/rtl/
353 Cashes disabled. simons 8273d 01h /or1k/tags/rel_25/or1200/rtl/
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8274d 04h /or1k/tags/rel_25/or1200/rtl/
351 Fixed some l.trap typos. lampret 8274d 06h /or1k/tags/rel_25/or1200/rtl/
350 For GDB changed single stepping and disabled trap exception. lampret 8274d 07h /or1k/tags/rel_25/or1200/rtl/
338 Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc) lampret 8279d 06h /or1k/tags/rel_25/or1200/rtl/
337 Fixed tick timer interrupt reporting by using TTCR[IP] bit. lampret 8279d 06h /or1k/tags/rel_25/or1200/rtl/
328 Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports. lampret 8280d 14h /or1k/tags/rel_25/or1200/rtl/
316 Fixed exceptions. lampret 8282d 12h /or1k/tags/rel_25/or1200/rtl/
271 Added missing endif lampret 8287d 01h /or1k/tags/rel_25/or1200/rtl/
265 Modified virtual silicon instantiations. lampret 8289d 21h /or1k/tags/rel_25/or1200/rtl/
220 Fixed parameters in generic sprams. lampret 8300d 20h /or1k/tags/rel_25/or1200/rtl/
219 Fixed sensitivity list. lampret 8301d 22h /or1k/tags/rel_25/or1200/rtl/
218 Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF. lampret 8301d 22h /or1k/tags/rel_25/or1200/rtl/

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