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[/] [or1k/] [tags/] [rel_26/] [or1200/] [rtl/] [verilog/] - Rev 1778

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Rev Log message Author Age Path
1765 root 5602d 13h /or1k/tags/rel_26/or1200/rtl/verilog/
1253 This commit was manufactured by cvs2svn to create tag 'rel_26'. 7457d 11h /or1k/tags/rel_26/or1200/rtl/verilog/
1252 preliminary HW breakpoints support in debug unit (by default disabled). To enable define OR1200_DU_HWBKPTS. lampret 7457d 11h /or1k/tags/rel_26/or1200/rtl/verilog/
1235 Error fixed. simons 7481d 02h /or1k/tags/rel_26/or1200/rtl/verilog/
1233 Errors fixed. simons 7481d 15h /or1k/tags/rel_26/or1200/rtl/verilog/
1231 Error fixed. simons 7481d 17h /or1k/tags/rel_26/or1200/rtl/verilog/
1229 Error fixed. simons 7481d 18h /or1k/tags/rel_26/or1200/rtl/verilog/
1226 interface to debug changed; no more opselect; stb-ack protocol markom 7484d 05h /or1k/tags/rel_26/or1200/rtl/verilog/
1225 Separate instruction and data QMEM decoders, QMEM acknowledge and byte-select added andreje 7487d 14h /or1k/tags/rel_26/or1200/rtl/verilog/
1220 Exception prefix configuration changed. simons 7512d 23h /or1k/tags/rel_26/or1200/rtl/verilog/
1219 Qmem mbist signals fixed. simons 7512d 23h /or1k/tags/rel_26/or1200/rtl/verilog/
1216 Support for ram with byte selects added. simons 7519d 21h /or1k/tags/rel_26/or1200/rtl/verilog/
1214 Mbist nameing changed, Artisan ram instance signal names fixed, some synthesis waning fixed. simons 7521d 00h /or1k/tags/rel_26/or1200/rtl/verilog/
1213 This commit was manufactured by cvs2svn to create branch 'branch_qmem'. 7525d 12h /or1k/tags/rel_26/or1200/rtl/verilog/
1210 No functional change. lampret 7525d 12h /or1k/tags/rel_26/or1200/rtl/verilog/
1209 Fixed instantiation name. lampret 7525d 12h /or1k/tags/rel_26/or1200/rtl/verilog/
1207 Static exception prefix. lampret 7525d 12h /or1k/tags/rel_26/or1200/rtl/verilog/
1206 Static exception prefix. lampret 7525d 13h /or1k/tags/rel_26/or1200/rtl/verilog/
1175 Added three missing wire declarations. No functional changes. lampret 7672d 11h /or1k/tags/rel_26/or1200/rtl/verilog/
1172 Added embedded memory QMEM. lampret 7674d 21h /or1k/tags/rel_26/or1200/rtl/verilog/
1171 Added embedded memory QMEM. lampret 7674d 21h /or1k/tags/rel_26/or1200/rtl/verilog/
1163 This commit was manufactured by cvs2svn to create branch 'branch_qmem'. 7707d 09h /or1k/tags/rel_26/or1200/rtl/verilog/
1161 When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. lampret 7707d 09h /or1k/tags/rel_26/or1200/rtl/verilog/
1159 No functional changes. Added defines to disable implementation of multiplier/MAC lampret 7750d 12h /or1k/tags/rel_26/or1200/rtl/verilog/
1155 No functional change. Only added customization for exception vectors. lampret 7753d 14h /or1k/tags/rel_26/or1200/rtl/verilog/
1140 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. lampret 7766d 15h /or1k/tags/rel_26/or1200/rtl/verilog/
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7766d 15h /or1k/tags/rel_26/or1200/rtl/verilog/
1132 RFRAM defines comments updated. Altera LPM option added. lampret 7767d 11h /or1k/tags/rel_26/or1200/rtl/verilog/
1131 Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. lampret 7767d 11h /or1k/tags/rel_26/or1200/rtl/verilog/
1130 RFRAM type always need to be defined. lampret 7767d 11h /or1k/tags/rel_26/or1200/rtl/verilog/

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