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Rev	Log message	Author	Age	Path
85	Added dumphex.	lampret	8538d 01h	/or1k/tags/rel_4/
84	Update.	lampret	8538d 01h	/or1k/tags/rel_4/
83	Updates.	lampret	8538d 01h	/or1k/tags/rel_4/
82	Changed pctemp to pcnext.	lampret	8538d 01h	/or1k/tags/rel_4/
80	First import.	lampret	8565d 20h	/or1k/tags/rel_4/
79	Data and instruction cache simulation added.	lampret	8567d 17h	/or1k/tags/rel_4/
78	(i/d)tlb_status	lampret	8691d 07h	/or1k/tags/rel_4/
77	Regular update.	lampret	8691d 07h	/or1k/tags/rel_4/
76	regular update	lampret	8691d 07h	/or1k/tags/rel_4/
75	simgetstr added. eval_mem32 replaced with evalsim_mem32.	lampret	8691d 07h	/or1k/tags/rel_4/
74	Same as DMMU.	lampret	8698d 06h	/or1k/tags/rel_4/
73	Fixed all bugs. Now more or less works. IMMU still has some problems (exception start).	lampret	8698d 06h	/or1k/tags/rel_4/
72	Added 'how to build GNU tools'	lampret	8703d 07h	/or1k/tags/rel_4/
71	Clean two typos.	lampret	8708d 09h	/or1k/tags/rel_4/
70	Basic setjmp/longjmp are ready.	lampret	8708d 09h	/or1k/tags/rel_4/
69	Sim debug.	lampret	8710d 07h	/or1k/tags/rel_4/
68	Added hook for l.sys 204. Changed SPR of flag (no more CCR)	lampret	8710d 07h	/or1k/tags/rel_4/
67	Added simulator "application load".	lampret	8710d 07h	/or1k/tags/rel_4/
66	Added another set of eval_ functions that should be used directly by simulator. evalsim_ and setsim_ don't go through MMU transaltion mechanism.	lampret	8710d 07h	/or1k/tags/rel_4/
65	Added DMMU stats.	lampret	8710d 07h	/or1k/tags/rel_4/
64	SPR bit definition moved to spr_defs.h.	lampret	8710d 07h	/or1k/tags/rel_4/
63	Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry alignment of bits).	lampret	8710d 07h	/or1k/tags/rel_4/
62	OR1K DMMU model.	lampret	8710d 07h	/or1k/tags/rel_4/
61	2000-09-26 Joel Sherrill <joel@OARcorp.com> * libc/sys/rtems/include/pthread.h: Added file missed by earlier commit of RTEMS modifications.	joel	8725d 01h	/or1k/tags/rel_4/
60	Memory model changed.	lampret	8745d 10h	/or1k/tags/rel_4/
59	2000-09-05 Joel Sherrill <joel@OARcorp.com> * Merged newlib-1.8.2-rtems-20000905.diff which includes or16 and or32 configuration support.	joel	8745d 21h	/or1k/tags/rel_4/
57	This commit was generated by cvs2svn to compensate for changes in r56, which included commits to RCS files with non-trunk default branches.	joel	8751d 19h	/or1k/tags/rel_4/
55	Added 'dv' command for dumping memory as verilog model.	lampret	8761d 07h	/or1k/tags/rel_4/
54	Regular maintenance.	lampret	8761d 07h	/or1k/tags/rel_4/
53	Added setjmp/longjmp.	lampret	8766d 07h	/or1k/tags/rel_4/

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[/] [or1k/] [tags/] [rel_4/] - Rev 85

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