OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_7/] - Rev 1001

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1001 fixed load/store state machine verilog generation errors markom 8022d 09h /or1k/tags/rel_7/
1000 IC/DC cache enable routines fixed. simons 8022d 10h /or1k/tags/rel_7/
999 Now every ramdisk image should have init program. simons 8022d 11h /or1k/tags/rel_7/
998 added missing fout initialization markom 8022d 12h /or1k/tags/rel_7/
997 PRINTF should be used instead of printf; command redirection repaired markom 8022d 13h /or1k/tags/rel_7/
996 some minor bugs fixed markom 8023d 12h /or1k/tags/rel_7/
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 8023d 19h /or1k/tags/rel_7/
993 Fixed IMMU bug. lampret 8023d 19h /or1k/tags/rel_7/
992 A bug when cache enabled and bus error comes fixed. simons 8024d 05h /or1k/tags/rel_7/
991 Different memory controller. simons 8024d 05h /or1k/tags/rel_7/
990 Test is now complete. simons 8024d 05h /or1k/tags/rel_7/
989 c++ is making problems so, for now, it is excluded. simons 8025d 13h /or1k/tags/rel_7/
988 ORP architecture supported. simons 8026d 04h /or1k/tags/rel_7/
987 ORP architecture supported. simons 8026d 11h /or1k/tags/rel_7/
986 outputs out of function are not registered anymore markom 8026d 12h /or1k/tags/rel_7/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8027d 00h /or1k/tags/rel_7/
984 Disable SB until it is tested lampret 8027d 00h /or1k/tags/rel_7/
983 First checkin lampret 8027d 02h /or1k/tags/rel_7/
982 Moved to sim/bin lampret 8027d 02h /or1k/tags/rel_7/
981 First checkin. lampret 8027d 02h /or1k/tags/rel_7/
980 Removed sim.tcl that shouldn't be here. lampret 8027d 02h /or1k/tags/rel_7/
979 Removed old test case binaries. lampret 8027d 02h /or1k/tags/rel_7/
978 Added variable delay for SRAM. lampret 8027d 02h /or1k/tags/rel_7/
977 Added store buffer. lampret 8027d 02h /or1k/tags/rel_7/
976 Added store buffer lampret 8027d 02h /or1k/tags/rel_7/
975 First checkin lampret 8027d 02h /or1k/tags/rel_7/
974 Enabled what works on or1ksim and disabled other tests. lampret 8027d 04h /or1k/tags/rel_7/
973 generated cuc top scheduler builds without syntax errors; not tested yet markom 8029d 08h /or1k/tags/rel_7/
972 Interrupt suorces fixed. simons 8029d 08h /or1k/tags/rel_7/
971 Now even keyboard test passes. simons 8029d 11h /or1k/tags/rel_7/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.