OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_7/] - Rev 1049

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1049 Added "breaks" command that prints all set breakpoints. ivang 7946d 12h /or1k/tags/rel_7/
1048 breakpoint can be set on labels markom 7947d 15h /or1k/tags/rel_7/
1047 options missing bug fixed markom 7949d 13h /or1k/tags/rel_7/
1046 cmov pushing through markom 7949d 13h /or1k/tags/rel_7/
1045 fixed type 2 joining FLAG_REG bug markom 7949d 19h /or1k/tags/rel_7/
1044 uncond branch simplification bug fixed markom 7949d 20h /or1k/tags/rel_7/
1043 cuc delay slot loading bug fixed markom 7949d 20h /or1k/tags/rel_7/
1042 added a-b-c, a-c bb simplification markom 7950d 14h /or1k/tags/rel_7/
1041 profiling miscalculation and add-sfxx joining bugs fixed markom 7950d 15h /or1k/tags/rel_7/
1040 Updated the script. lampret 7951d 08h /or1k/tags/rel_7/
1039 Added linter directory. lampret 7951d 08h /or1k/tags/rel_7/
1038 Fixed a typo, reported by Taylor Su. lampret 7951d 10h /or1k/tags/rel_7/
1037 First import of the new synopsys DC scripts. lampret 7951d 10h /or1k/tags/rel_7/
1036 Removed old synthesis scripts. lampret 7951d 11h /or1k/tags/rel_7/
1035 Added optional l.div/l.divu insns. By default they are disabled. lampret 7951d 23h /or1k/tags/rel_7/
1034 Fixed encoding for l.div/l.divu. lampret 7952d 03h /or1k/tags/rel_7/
1033 If SR[CY] implemented with OR1200_IMPL_ADDC enabled, l.add/l.addi also set SR[CY]. lampret 7952d 10h /or1k/tags/rel_7/
1032 Added optional SR[CY]. Added define to enable additional (compare) flag modifiers. Defines are OR1200_IMPL_ADDC and OR1200_ADDITIONAL_FLAG_MODIFIERS. lampret 7953d 00h /or1k/tags/rel_7/
1031 Setting phy to 10Mbps full duplex. simons 7953d 15h /or1k/tags/rel_7/
1030 Ethernet configured for 10Mbps. simons 7954d 12h /or1k/tags/rel_7/
1029 Typing error fixed. simons 7954d 12h /or1k/tags/rel_7/
1028 Import. ivang 7954d 12h /or1k/tags/rel_7/
1027 PRINTF/printf mess fixed. simons 7954d 20h /or1k/tags/rel_7/
1026 rtems-20020807 import ivang 7955d 06h /or1k/tags/rel_7/
1025 PRINTF/printf mess fixed. simons 7955d 09h /or1k/tags/rel_7/
1024 Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes. simons 7955d 18h /or1k/tags/rel_7/
1023 Now most of the configuration registers are updatded automatically based on defines in or1200_defines.v. lampret 7956d 04h /or1k/tags/rel_7/
1022 As per Taylor Su suggestion all case blocks are full case by default and optionally (OR1200_CASE_DEFAULT) can be disabled to increase clock frequncy. lampret 7956d 07h /or1k/tags/rel_7/
1021 *** empty log message *** rherveille 7960d 09h /or1k/tags/rel_7/
1020 Fixed several bugs
Working version, tested on Bender hardware		 rherveille 7960d 10h /or1k/tags/rel_7/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.