OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_7/] - Rev 823

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
823 Added configuration parameter for specifying stdout file filename. ivang 8153d 15h /or1k/tags/rel_7/
822 bug fixed in crc calculation markom 8153d 21h /or1k/tags/rel_7/
821 ugly bug with duplicate redefined i removed markom 8155d 16h /or1k/tags/rel_7/
820 self check added markom 8155d 19h /or1k/tags/rel_7/
819 Physical address bug fixed. simons 8158d 14h /or1k/tags/rel_7/
818 crc added markom 8158d 16h /or1k/tags/rel_7/
817 Code cleaned. simons 8158d 19h /or1k/tags/rel_7/
816 memory/flash copy/boot; default src_addr; dhry added; memmove added; tftp.c moved to load.c markom 8158d 19h /or1k/tags/rel_7/
815 Elf support added. simons 8159d 09h /or1k/tags/rel_7/
814 flash driver added markom 8159d 15h /or1k/tags/rel_7/
813 elf support added markom 8159d 16h /or1k/tags/rel_7/
812 new number parsing, ip parsing markom 8159d 16h /or1k/tags/rel_7/
810 This commit was generated by cvs2svn to compensate for changes in r809,
which included commits to RCS files with non-trunk default branches.
simons 8159d 19h /or1k/tags/rel_7/
808 Elf support added. simons 8159d 19h /or1k/tags/rel_7/
807 sched files moved to support dir markom 8160d 22h /or1k/tags/rel_7/
806 uart now partially uses scheduler markom 8160d 22h /or1k/tags/rel_7/
805 kbd, fb, vga devices now uses scheduler markom 8160d 22h /or1k/tags/rel_7/
804 memory regions can now overlap with MC -- not according to MC spec markom 8161d 16h /or1k/tags/rel_7/
803 Free irq handler fixed. simons 8164d 09h /or1k/tags/rel_7/
802 Cache and tick timer tests fixed. simons 8165d 20h /or1k/tags/rel_7/
801 l.muli instruction added markom 8167d 16h /or1k/tags/rel_7/
800 Bug fixed. simons 8168d 14h /or1k/tags/rel_7/
799 Wrapping around 512k boundary to simulate real hw. simons 8172d 07h /or1k/tags/rel_7/
798 Hardware scroll added. This possible due to the fact that crt is wrapping around 512k boundary. simons 8172d 07h /or1k/tags/rel_7/
797 Changed hardcoded address for fake MC to use a define. lampret 8172d 08h /or1k/tags/rel_7/
796 Removed unused ports wb_clki and wb_rst_i lampret 8172d 08h /or1k/tags/rel_7/
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8172d 13h /or1k/tags/rel_7/
794 Added again just recently removed full_case directive lampret 8172d 13h /or1k/tags/rel_7/
793 Added synthesis off/on for timescale.v included file. lampret 8172d 13h /or1k/tags/rel_7/
792 Fixed port names that changed. lampret 8172d 13h /or1k/tags/rel_7/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.