Rev |
Log message |
Author |
Age |
Path |
1155 |
No functional change. Only added customization for exception vectors. |
lampret |
7782d 17h |
/or1k/tags/rel_9/ |
1154 |
When using tty channel, put the serial port into raw mode (no echo, no
CR/LF conversion, no other line discipline/buffering). |
sfurman |
7790d 08h |
/or1k/tags/rel_9/ |
1153 |
When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.
Fix tested w/ both eCos and uclinux. |
sfurman |
7790d 19h |
/or1k/tags/rel_9/ |
1152 |
*** empty log message *** |
phoenix |
7790d 23h |
/or1k/tags/rel_9/ |
1151 |
*** empty log message *** |
phoenix |
7790d 23h |
/or1k/tags/rel_9/ |
1150 |
remove unneded include |
phoenix |
7791d 01h |
/or1k/tags/rel_9/ |
1149 |
*** empty log message *** |
phoenix |
7791d 12h |
/or1k/tags/rel_9/ |
1148 |
*** empty log message *** |
phoenix |
7791d 12h |
/or1k/tags/rel_9/ |
1147 |
remove unneeded include |
phoenix |
7791d 12h |
/or1k/tags/rel_9/ |
1146 |
cygwin fix |
phoenix |
7791d 12h |
/or1k/tags/rel_9/ |
1145 |
1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine. |
sfurman |
7791d 13h |
/or1k/tags/rel_9/ |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7793d 19h |
/or1k/tags/rel_9/ |
1143 |
Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. |
sfurman |
7794d 09h |
/or1k/tags/rel_9/ |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7794d 09h |
/or1k/tags/rel_9/ |
1141 |
WB = 1/2 RISC clock test code enabled. |
lampret |
7795d 18h |
/or1k/tags/rel_9/ |
1140 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. |
lampret |
7795d 18h |
/or1k/tags/rel_9/ |
1139 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. |
lampret |
7795d 18h |
/or1k/tags/rel_9/ |
1138 |
Added some information how to run simulations. |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1137 |
Added RFRAM generic and Altera lpm library. |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1136 |
Add altera lpm library. |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1135 |
Added get_gpr support for OR1200_RFRAM_GENERIC |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1134 |
Changed location of debug test code to 0. |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1133 |
Adding OR1200_CLMODE_1TO2 test code. |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1132 |
RFRAM defines comments updated. Altera LPM option added. |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1131 |
Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1130 |
RFRAM type always need to be defined. |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1129 |
Added Altera LPM RAMs. Changed generic RAM output when OE inactive. |
lampret |
7796d 14h |
/or1k/tags/rel_9/ |
1128 |
Fixed my bustage: Add missing 2nd argument to open(). Otherwise,
opening a serial port channel can sporadically fail. |
sfurman |
7801d 13h |
/or1k/tags/rel_9/ |
1127 |
Added ability to map I/O from simulated UARTs to physical serial ports
on the host running the simulator. |
sfurman |
7804d 14h |
/or1k/tags/rel_9/ |
1126 |
Added lengthy comment explaining all possible choices for UART
channels, e.g. xterm, tcp, file, etc. |
sfurman |
7806d 16h |
/or1k/tags/rel_9/ |