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[/] [or1k/] [tags/] [rel_9/] - Rev 657

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Rev Log message Author Age Path
657 VGA console support added with frame buffer driver for CRT engine. simons 8190d 13h /or1k/tags/rel_9/
656 VGA console support added with frame buffer driver for CRT engine. simons 8190d 13h /or1k/tags/rel_9/
655 TLB registers addresses changed. simons 8193d 04h /or1k/tags/rel_9/
654 This is repaired in new versions of uClinux. simons 8193d 05h /or1k/tags/rel_9/
653 Some cleanup. simons 8193d 05h /or1k/tags/rel_9/
652 Some cleanup. simons 8193d 06h /or1k/tags/rel_9/
651 Some cleanup. simons 8193d 06h /or1k/tags/rel_9/
650 Some cleanup. simons 8193d 07h /or1k/tags/rel_9/
649 Some cleanup. simons 8193d 07h /or1k/tags/rel_9/
648 fb now works in system memory markom 8194d 16h /or1k/tags/rel_9/
647 some changes to fb to make it compatible with HW markom 8195d 10h /or1k/tags/rel_9/
646 some bugs fixed markom 8195d 12h /or1k/tags/rel_9/
645 simple frame buffer peripheral with test added markom 8195d 16h /or1k/tags/rel_9/
644 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8196d 11h /or1k/tags/rel_9/
643 Quick bug fix. ivang 8196d 11h /or1k/tags/rel_9/
642 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8196d 11h /or1k/tags/rel_9/
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8196d 11h /or1k/tags/rel_9/
640 Merge profiler and mprofiler with sim. ivang 8196d 13h /or1k/tags/rel_9/
639 MMU cache inhibit bit test added. simons 8199d 03h /or1k/tags/rel_9/
638 TLBTR CI bit is now working properly. simons 8199d 04h /or1k/tags/rel_9/
637 Updated file names. lampret 8199d 05h /or1k/tags/rel_9/
636 Fixed combinational loops. lampret 8199d 05h /or1k/tags/rel_9/
635 Fixed Makefile bug. ivang 8199d 07h /or1k/tags/rel_9/
634 configure.in : fixed to build start/Makefile
start.S : l.jalr r9 -> l.jr r9

Added missing files.		 ivang 8200d 08h /or1k/tags/rel_9/
633 Bug fix in command line parser. ivang 8200d 09h /or1k/tags/rel_9/
632 profiler and mprofiler merged into sim. ivang 8201d 04h /or1k/tags/rel_9/
631 Real cache access is simulated now. simons 8202d 03h /or1k/tags/rel_9/
630 some bug fixes in store buffer analysis markom 8202d 12h /or1k/tags/rel_9/
629 typo fixed markom 8202d 15h /or1k/tags/rel_9/
627 or32 restored markom 8202d 16h /or1k/tags/rel_9/

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