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[/] [or1k/] [tags/] [rel_9/] - Rev 798

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798 Hardware scroll added. This possible due to the fact that crt is wrapping around 512k boundary. simons 8143d 15h /or1k/tags/rel_9/
797 Changed hardcoded address for fake MC to use a define. lampret 8143d 16h /or1k/tags/rel_9/
796 Removed unused ports wb_clki and wb_rst_i lampret 8143d 16h /or1k/tags/rel_9/
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8143d 21h /or1k/tags/rel_9/
794 Added again just recently removed full_case directive lampret 8143d 21h /or1k/tags/rel_9/
793 Added synthesis off/on for timescale.v included file. lampret 8143d 21h /or1k/tags/rel_9/
792 Fixed port names that changed. lampret 8143d 21h /or1k/tags/rel_9/
791 Fixed some ports in instnatiations that were removed from the modules lampret 8143d 21h /or1k/tags/rel_9/
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8143d 21h /or1k/tags/rel_9/
789 Added response from memory controller (addr 0x60000000) lampret 8143d 22h /or1k/tags/rel_9/
788 Some of the warnings fixed. lampret 8143d 22h /or1k/tags/rel_9/
787 Added romfs.tgz lampret 8144d 16h /or1k/tags/rel_9/
786 Moved UCF constraint file to the backend directory. lampret 8144d 16h /or1k/tags/rel_9/
785 Added XSV specific documentation. lampret 8144d 17h /or1k/tags/rel_9/
784 Added soem missing files. lampret 8144d 17h /or1k/tags/rel_9/
783 Added sim directory and sub files/dirs. lampret 8144d 17h /or1k/tags/rel_9/
782 Added the old SW directory. It needs to be updated for the new ORP environment and test cases moved to sw directory. lampret 8144d 17h /or1k/tags/rel_9/
781 Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well. lampret 8144d 17h /or1k/tags/rel_9/
780 Added libraries. lampret 8144d 17h /or1k/tags/rel_9/
779 Added bench directory lampret 8144d 17h /or1k/tags/rel_9/
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8144d 18h /or1k/tags/rel_9/
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8144d 18h /or1k/tags/rel_9/
776 Updated defines. lampret 8144d 18h /or1k/tags/rel_9/
775 Optimized cache controller FSM. lampret 8144d 18h /or1k/tags/rel_9/
774 Removed old files. lampret 8144d 19h /or1k/tags/rel_9/
773 Changing directory structure ... lampret 8144d 19h /or1k/tags/rel_9/
772 Changing directory structure ... lampret 8144d 20h /or1k/tags/rel_9/
771 Added Makefile that is used to convert linux binary to loadable file for XSV board lampret 8145d 19h /or1k/tags/rel_9/
770 Maze application added. Mouse driver changed. simons 8146d 12h /or1k/tags/rel_9/
768 This commit was generated by cvs2svn to compensate for changes in r767,
which included commits to RCS files with non-trunk default branches.		 lampret 8146d 16h /or1k/tags/rel_9/

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