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[/] [or1k/] [tags/] [stable_0_2_0/] - Rev 1616

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Rev Log message Author Age Path
1616 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6771d 11h /or1k/tags/stable_0_2_0/
1615 *** empty log message *** phoenix 6771d 11h /or1k/tags/stable_0_2_0/
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6781d 12h /or1k/tags/stable_0_2_0/
1613 change default phoenix 6786d 21h /or1k/tags/stable_0_2_0/
1612 major optimizations for or32 target phoenix 6786d 21h /or1k/tags/stable_0_2_0/
1610 Update ChangeLog nogj 6789d 22h /or1k/tags/stable_0_2_0/
1609 0.2.0-rc2 release nogj 6789d 23h /or1k/tags/stable_0_2_0/
1608 Avoid scheduleing too many jobs, potentially underflowing the scheduler stack nogj 6790d 17h /or1k/tags/stable_0_2_0/
1607 Don't drop cycles from the scheduler nogj 6790d 17h /or1k/tags/stable_0_2_0/
1606 fix uninitialized reads phoenix 6790d 22h /or1k/tags/stable_0_2_0/
1605 Execute l.ff1 instruction nogj 6797d 18h /or1k/tags/stable_0_2_0/
1604 Fix dumphex/dumpverilog to not do unaligned memory access nogj 6797d 18h /or1k/tags/stable_0_2_0/
1603 Accept EM_OPENRISC as a valid machine nogj 6798d 22h /or1k/tags/stable_0_2_0/
1602 Corrected description of l.sfXXui (arch manual had a wrong description compared to behavior implemented in or1ksim/gcc/or1200). Removed Atomicity chapter. lampret 6799d 20h /or1k/tags/stable_0_2_0/
1601 fixed description of l.sfXXXi lampret 6799d 20h /or1k/tags/stable_0_2_0/
1600 Corrected mistake in pin assignation due to typo error in RC203 manual jcastillo 6807d 21h /or1k/tags/stable_0_2_0/
1599 Corrected Syn Script to add MMU memories jcastillo 6808d 04h /or1k/tags/stable_0_2_0/
1598 Handle ethernet addresses as an address and not as an int nogj 6809d 19h /or1k/tags/stable_0_2_0/
1597 Fix parsing the destination register nogj 6809d 19h /or1k/tags/stable_0_2_0/
1596 Fix handling of eof in the sim cli nogj 6809d 19h /or1k/tags/stable_0_2_0/
1595 Add default immu/dmmu page size nogj 6809d 20h /or1k/tags/stable_0_2_0/
1594 Fix the case of is_power2(0) nogj 6809d 20h /or1k/tags/stable_0_2_0/
1593 Don't kill sim on second ctrl+c if the cli prompt has already been shown nogj 6809d 20h /or1k/tags/stable_0_2_0/
1592 Added additional desc of tick timer, added l.fl1, corrected desc of l.ff1 and corrected encoding of l.maci lampret 6811d 22h /or1k/tags/stable_0_2_0/
1591 Added l.fl1, fixed desc of l.ff1 lampret 6812d 17h /or1k/tags/stable_0_2_0/
1590 Added l.fl1 lampret 6812d 17h /or1k/tags/stable_0_2_0/
1589 Make -d channel be equivalent to -d +channel nogj 6816d 04h /or1k/tags/stable_0_2_0/
1588 Correct INT_MAX->INT32_MAX nogj 6816d 05h /or1k/tags/stable_0_2_0/
1587 Supports two RAM banks by Jacob Bower jcastillo 6819d 18h /or1k/tags/stable_0_2_0/
1586 Charles Qi
Fix memory handling on big endian machines		 nogj 6820d 21h /or1k/tags/stable_0_2_0/

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