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[/] [or1k/] [tags/] [stable_0_2_0/] - Rev 641

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Rev Log message Author Age Path
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8195d 10h /or1k/tags/stable_0_2_0/
640 Merge profiler and mprofiler with sim. ivang 8195d 12h /or1k/tags/stable_0_2_0/
639 MMU cache inhibit bit test added. simons 8198d 02h /or1k/tags/stable_0_2_0/
638 TLBTR CI bit is now working properly. simons 8198d 03h /or1k/tags/stable_0_2_0/
637 Updated file names. lampret 8198d 04h /or1k/tags/stable_0_2_0/
636 Fixed combinational loops. lampret 8198d 04h /or1k/tags/stable_0_2_0/
635 Fixed Makefile bug. ivang 8198d 06h /or1k/tags/stable_0_2_0/
634 configure.in : fixed to build start/Makefile
start.S : l.jalr r9 -> l.jr r9

Added missing files.		 ivang 8199d 07h /or1k/tags/stable_0_2_0/
633 Bug fix in command line parser. ivang 8199d 08h /or1k/tags/stable_0_2_0/
632 profiler and mprofiler merged into sim. ivang 8200d 03h /or1k/tags/stable_0_2_0/
631 Real cache access is simulated now. simons 8201d 01h /or1k/tags/stable_0_2_0/
630 some bug fixes in store buffer analysis markom 8201d 10h /or1k/tags/stable_0_2_0/
629 typo fixed markom 8201d 14h /or1k/tags/stable_0_2_0/
627 or32 restored markom 8201d 15h /or1k/tags/stable_0_2_0/
626 store buffer added markom 8201d 15h /or1k/tags/stable_0_2_0/
625 Bus error bug fixed. Cache routines added. simons 8202d 07h /or1k/tags/stable_0_2_0/
624 Added logging of writes/read to/from SPR registers. ivang 8202d 07h /or1k/tags/stable_0_2_0/
623 update based on recent changes; arithmetic instructions does not modify carry yet markom 8202d 09h /or1k/tags/stable_0_2_0/
622 Cache test works on hardware. simons 8202d 12h /or1k/tags/stable_0_2_0/
621 Cache test works on hardware. simons 8202d 13h /or1k/tags/stable_0_2_0/
620 use ARITH_SET_FLAG to turn off set flag by arith. instructions markom 8202d 13h /or1k/tags/stable_0_2_0/
619 all test pass, after newest changes markom 8202d 13h /or1k/tags/stable_0_2_0/
618 Fixed display of new 'void' nop insns. lampret 8202d 22h /or1k/tags/stable_0_2_0/
617 Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways. lampret 8202d 22h /or1k/tags/stable_0_2_0/
616 flags test added markom 8205d 08h /or1k/tags/stable_0_2_0/
615 cmov and extxx instructions; add, addi, and, andi now set flag markom 8205d 09h /or1k/tags/stable_0_2_0/
614 Changed to support new debug if. simons 8205d 16h /or1k/tags/stable_0_2_0/
613 init: trap exception occurs always; initialization of sr not needed anymore markom 8206d 13h /or1k/tags/stable_0_2_0/
612 Tick timer period extended to meet real timing. simons 8206d 14h /or1k/tags/stable_0_2_0/
611 EEAR register is not changed by trap, sys, int, tick and range exception. simons 8207d 15h /or1k/tags/stable_0_2_0/

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