OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0/] - Rev 763

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
763 FTP and telnet working on or1ksim. simons 8149d 00h /or1k/tags/stable_0_2_0/
762 Mistake fixed. simons 8152d 12h /or1k/tags/stable_0_2_0/
761 Checksum calculation fixed. simons 8152d 14h /or1k/tags/stable_0_2_0/
760 Fixed defines for running on XSV800 at 10MHz lampret 8153d 00h /or1k/tags/stable_0_2_0/
759 Explained 10MHz. Fixed directory name. lampret 8153d 00h /or1k/tags/stable_0_2_0/
758 Fixed relative/absolute paths. Changed soem file names. lampret 8153d 00h /or1k/tags/stable_0_2_0/
757 Removed or1ksim binary. Properly is to compile it and install it. lampret 8153d 01h /or1k/tags/stable_0_2_0/
756 Changed clock from 12.5MHz to 10MHz. lampret 8153d 01h /or1k/tags/stable_0_2_0/
755 This commit was generated by cvs2svn to compensate for changes in r754,
which included commits to RCS files with non-trunk default branches.
lampret 8153d 02h /or1k/tags/stable_0_2_0/
753 Memory map and interrupt settings changed to fit new hw. simons 8153d 03h /or1k/tags/stable_0_2_0/
752 Fixed some typos lampret 8153d 05h /or1k/tags/stable_0_2_0/
751 This commit was generated by cvs2svn to compensate for changes in r750,
which included commits to RCS files with non-trunk default branches.
lampret 8153d 05h /or1k/tags/stable_0_2_0/
749 This commit was generated by cvs2svn to compensate for changes in r748,
which included commits to RCS files with non-trunk default branches.
lampret 8153d 05h /or1k/tags/stable_0_2_0/
747 First import of the "new" XESS XSV environment. lampret 8153d 05h /or1k/tags/stable_0_2_0/
746 First import of the "new" XESS XSV environment. lampret 8153d 06h /or1k/tags/stable_0_2_0/
745 ifconfig route and ping tested on or1ksim. simons 8157d 03h /or1k/tags/stable_0_2_0/
744 Some changes and fixes. simons 8157d 03h /or1k/tags/stable_0_2_0/
743 Ping is working on or1ksim. simons 8157d 03h /or1k/tags/stable_0_2_0/
742 Added status info dump. ivang 8159d 11h /or1k/tags/stable_0_2_0/
741 Added dump of MC status. ivang 8159d 12h /or1k/tags/stable_0_2_0/
740 Serial baud rate define used for uart config. simons 8160d 05h /or1k/tags/stable_0_2_0/
739 Console setup fixed. simons 8160d 05h /or1k/tags/stable_0_2_0/
738 *** empty log message *** ivang 8160d 12h /or1k/tags/stable_0_2_0/
737 Added alternative for critical path in DU. lampret 8160d 22h /or1k/tags/stable_0_2_0/
736 Changed generation of SPR address. Now it is ORed from base and offset instead of a sum. lampret 8163d 21h /or1k/tags/stable_0_2_0/
735 Fixed async loop. Changed multiplier type for ASIC. lampret 8163d 21h /or1k/tags/stable_0_2_0/
734 Fixed eth configuration. ivang 8166d 07h /or1k/tags/stable_0_2_0/
733 Fixed configuration. ivang 8166d 07h /or1k/tags/stable_0_2_0/
732 Fixed error during merge. ivang 8166d 07h /or1k/tags/stable_0_2_0/
731 Merge. ivang 8166d 07h /or1k/tags/stable_0_2_0/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.