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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 1107

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Rev Log message Author Age Path
1107 Updatded and improved formatting. lampret 7838d 18h /or1k/tags/stable_0_2_0_rc1/
1106 Cache invalidate bug fixed again (it was ok before). simons 7872d 22h /or1k/tags/stable_0_2_0_rc1/
1105 Added WB b3 signals lampret 7874d 05h /or1k/tags/stable_0_2_0_rc1/
1104 Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional. lampret 7874d 05h /or1k/tags/stable_0_2_0_rc1/
1103 sync problem in cuc not yet fixed markom 7878d 23h /or1k/tags/stable_0_2_0_rc1/
1102 few cuc bug fixes markom 7879d 00h /or1k/tags/stable_0_2_0_rc1/
1101 cuc now compiles markom 7879d 02h /or1k/tags/stable_0_2_0_rc1/
1100 cvs problem fixed markom 7879d 02h /or1k/tags/stable_0_2_0_rc1/
1099 cvs bug fixed markom 7879d 03h /or1k/tags/stable_0_2_0_rc1/
1098 small bug in cuc fixed markom 7879d 03h /or1k/tags/stable_0_2_0_rc1/
1097 Cache invalidate bug fixed. simons 7879d 17h /or1k/tags/stable_0_2_0_rc1/
1096 An example of SW and RTL regression log because many people asked for. lampret 7885d 14h /or1k/tags/stable_0_2_0_rc1/
1095 eval_reg replaced with the new evalsim_reg32 lampret 7886d 11h /or1k/tags/stable_0_2_0_rc1/
1094 sys/time.h might not be available for or1k target lampret 7886d 12h /or1k/tags/stable_0_2_0_rc1/
1093 New UART rx/tx fiel settings (due to or1ksim upgrade) lampret 7886d 12h /or1k/tags/stable_0_2_0_rc1/
1092 Changed from or32-rtems toolchain to or32-uclinux. lampret 7886d 12h /or1k/tags/stable_0_2_0_rc1/
1091 Added mmu test. lampret 7886d 12h /or1k/tags/stable_0_2_0_rc1/
1090 Removed ic_invalidate lampret 7886d 12h /or1k/tags/stable_0_2_0_rc1/
1089 Added dhrystone 2.1 benchmark lampret 7886d 12h /or1k/tags/stable_0_2_0_rc1/
1088 Changed from or32-rtems toolchain to or32-uclinux. lampret 7886d 12h /or1k/tags/stable_0_2_0_rc1/
1087 Changed or32-rtems to or32-uclinux. lampret 7886d 12h /or1k/tags/stable_0_2_0_rc1/
1086 STACK_ARGS is getting obsolete and is only needed by simprintf, which needs it to be 0. lampret 7886d 13h /or1k/tags/stable_0_2_0_rc1/
1085 Bug fixed. simons 7891d 17h /or1k/tags/stable_0_2_0_rc1/
1083 SB mem width fixed. simons 7906d 00h /or1k/tags/stable_0_2_0_rc1/
1082 channels integration rprescott 7906d 12h /or1k/tags/stable_0_2_0_rc1/
1081 or32-uclinux tool chain have to be used to build the testbench. simons 7914d 04h /or1k/tags/stable_0_2_0_rc1/
1079 RAMs wrong connected to the BIST scan chain. mohor 7914d 22h /or1k/tags/stable_0_2_0_rc1/
1078 Previous check-in was done by mistake. mohor 7914d 23h /or1k/tags/stable_0_2_0_rc1/
1077 Signal scanb_sen renamed to scanb_en. mohor 7914d 23h /or1k/tags/stable_0_2_0_rc1/
1076 channels integration rprescott 7915d 17h /or1k/tags/stable_0_2_0_rc1/

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