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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 1115

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Rev Log message Author Age Path
1115 Fix stack-walking code in or1k_frame_chain() and or1k_skip_prologue()
to expect the function prologue that or32 gcc currently emits, rather
than a previous incarnation of the or1k ABI.		 sfurman 7802d 19h /or1k/tags/stable_0_2_0_rc1/
1114 Added cvs log keywords lampret 7817d 15h /or1k/tags/stable_0_2_0_rc1/
1113 Typos by Maria Bolado lampret 7817d 15h /or1k/tags/stable_0_2_0_rc1/
1112 Updated sensitivity list for trace buffer [only relevant for Xilinx FPGAs] lampret 7823d 16h /or1k/tags/stable_0_2_0_rc1/
1111 Small fix for path of tth binary. lampret 7832d 22h /or1k/tags/stable_0_2_0_rc1/
1110 Re-generated. lampret 7832d 23h /or1k/tags/stable_0_2_0_rc1/
1109 Temp files should rather not be in the cvs repository. lampret 7832d 23h /or1k/tags/stable_0_2_0_rc1/
1108 Errors fixed. lampret 7832d 23h /or1k/tags/stable_0_2_0_rc1/
1107 Updatded and improved formatting. lampret 7832d 23h /or1k/tags/stable_0_2_0_rc1/
1106 Cache invalidate bug fixed again (it was ok before). simons 7867d 03h /or1k/tags/stable_0_2_0_rc1/
1105 Added WB b3 signals lampret 7868d 10h /or1k/tags/stable_0_2_0_rc1/
1104 Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional. lampret 7868d 10h /or1k/tags/stable_0_2_0_rc1/
1103 sync problem in cuc not yet fixed markom 7873d 04h /or1k/tags/stable_0_2_0_rc1/
1102 few cuc bug fixes markom 7873d 04h /or1k/tags/stable_0_2_0_rc1/
1101 cuc now compiles markom 7873d 07h /or1k/tags/stable_0_2_0_rc1/
1100 cvs problem fixed markom 7873d 07h /or1k/tags/stable_0_2_0_rc1/
1099 cvs bug fixed markom 7873d 07h /or1k/tags/stable_0_2_0_rc1/
1098 small bug in cuc fixed markom 7873d 08h /or1k/tags/stable_0_2_0_rc1/
1097 Cache invalidate bug fixed. simons 7873d 22h /or1k/tags/stable_0_2_0_rc1/
1096 An example of SW and RTL regression log because many people asked for. lampret 7879d 19h /or1k/tags/stable_0_2_0_rc1/
1095 eval_reg replaced with the new evalsim_reg32 lampret 7880d 15h /or1k/tags/stable_0_2_0_rc1/
1094 sys/time.h might not be available for or1k target lampret 7880d 17h /or1k/tags/stable_0_2_0_rc1/
1093 New UART rx/tx fiel settings (due to or1ksim upgrade) lampret 7880d 17h /or1k/tags/stable_0_2_0_rc1/
1092 Changed from or32-rtems toolchain to or32-uclinux. lampret 7880d 17h /or1k/tags/stable_0_2_0_rc1/
1091 Added mmu test. lampret 7880d 17h /or1k/tags/stable_0_2_0_rc1/
1090 Removed ic_invalidate lampret 7880d 17h /or1k/tags/stable_0_2_0_rc1/
1089 Added dhrystone 2.1 benchmark lampret 7880d 17h /or1k/tags/stable_0_2_0_rc1/
1088 Changed from or32-rtems toolchain to or32-uclinux. lampret 7880d 17h /or1k/tags/stable_0_2_0_rc1/
1087 Changed or32-rtems to or32-uclinux. lampret 7880d 17h /or1k/tags/stable_0_2_0_rc1/
1086 STACK_ARGS is getting obsolete and is only needed by simprintf, which needs it to be 0. lampret 7880d 18h /or1k/tags/stable_0_2_0_rc1/

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