OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] - Rev 1358

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7109d 03h /or1k/tags/stable_0_2_0_rc1/
1355 Fix dmatest testcase nogj 7116d 13h /or1k/tags/stable_0_2_0_rc1/
1354 typing fixes phoenix 7117d 09h /or1k/tags/stable_0_2_0_rc1/
1353 Modularise simulator command parsing nogj 7118d 05h /or1k/tags/stable_0_2_0_rc1/
1352 Optimise execution history tracking nogj 7118d 06h /or1k/tags/stable_0_2_0_rc1/
1351 Reindent create_watchpoints useing a more compact indentation style nogj 7118d 06h /or1k/tags/stable_0_2_0_rc1/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7118d 06h /or1k/tags/stable_0_2_0_rc1/
1349 Works with GDB jcastillo 7120d 06h /or1k/tags/stable_0_2_0_rc1/
1348 Converted to current simulator configuration format jcastillo 7123d 11h /or1k/tags/stable_0_2_0_rc1/
1347 Remove backup file nogj 7129d 17h /or1k/tags/stable_0_2_0_rc1/
1346 Remove the global op structure nogj 7131d 09h /or1k/tags/stable_0_2_0_rc1/
1345 Fix out-of-tree builds nogj 7131d 10h /or1k/tags/stable_0_2_0_rc1/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7131d 10h /or1k/tags/stable_0_2_0_rc1/
1343 * Fix warnings in insnset.c and execute.c nogj 7131d 10h /or1k/tags/stable_0_2_0_rc1/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7131d 10h /or1k/tags/stable_0_2_0_rc1/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7131d 10h /or1k/tags/stable_0_2_0_rc1/
1339 revert to the old l.sfxxi behavior phoenix 7145d 13h /or1k/tags/stable_0_2_0_rc1/
1338 l.ff1 instruction added andreje 7147d 08h /or1k/tags/stable_0_2_0_rc1/
1337 du_hwbkpt disabled when debug unit not implemented andreje 7151d 14h /or1k/tags/stable_0_2_0_rc1/
1336 sign/zero extension for l.sfxxi instructions corrected andreje 7151d 14h /or1k/tags/stable_0_2_0_rc1/
1335 flag for l.cmov instruction added andreje 7151d 14h /or1k/tags/stable_0_2_0_rc1/
1334 l.ff1 and l.cmov instructions added andreje 7151d 14h /or1k/tags/stable_0_2_0_rc1/
1333 gcc 3.4 compile fix phoenix 7162d 09h /or1k/tags/stable_0_2_0_rc1/
1332 gcc 3.4.3 compile fix phoenix 7166d 02h /or1k/tags/stable_0_2_0_rc1/
1331 jtag bugfix phoenix 7171d 02h /or1k/tags/stable_0_2_0_rc1/
1330 jtag bugfix phoenix 7171d 02h /or1k/tags/stable_0_2_0_rc1/
1329 Synplify synthesis script first import jcastillo 7175d 13h /or1k/tags/stable_0_2_0_rc1/
1327 Firt import of OR1200 over Celoxica RC203 platform jcastillo 7176d 06h /or1k/tags/stable_0_2_0_rc1/
1325 Initial import of uClibc-0.9.26 phoenix 7207d 00h /or1k/tags/stable_0_2_0_rc1/
1324 memory access functions fixes phoenix 7229d 01h /or1k/tags/stable_0_2_0_rc1/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.