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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [gen_or1k_isa/] [sources/] [opcode/] - Rev 1765

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1765 root 5577d 08h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1572 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc1'. 6851d 15h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1557 Fix most warnings issued by gcc4 nogj 6859d 22h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1554 fixed l.maci encoding phoenix 6877d 09h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 6990d 12h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1452 Implement a dynamic recompiler to speed up the execution nogj 7017d 15h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7017d 15h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7032d 18h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7067d 13h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1346 Remove the global op structure nogj 7080d 17h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7080d 17h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7080d 18h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1338 l.ff1 instruction added andreje 7096d 15h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1309 removed includes phoenix 7269d 11h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1308 Gyorgy Jeney: extensive cleanup phoenix 7272d 08h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7294d 08h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1286 Changed desciption of the l.cust5 insns lampret 7343d 11h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1285 Changed desciption of the l.cust5 insns lampret 7343d 11h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1169 Added support for l.addc instruction. csanchez 7656d 11h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1114 Added cvs log keywords lampret 7811d 03h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
1034 Fixed encoding for l.div/l.divu. lampret 7953d 04h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8018d 14h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
801 l.muli instruction added markom 8110d 18h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
722 floating point registers are obsolete; GPRs should be used instead markom 8138d 17h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
720 single floating point support added markom 8138d 21h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
717 some minor improvements markom 8138d 23h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
714 do_stats introduced for faster no-stats execution markom 8140d 19h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
709 eval_operands is now being generated markom 8144d 00h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
706 insn_decode execution part replaced by generated function decode_execute; use --enable-simple to use runtime decoding markom 8144d 17h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/
703 small optimizations to dissasemble markom 8145d 21h /or1k/tags/stable_0_2_0_rc1/gen_or1k_isa/sources/opcode/

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