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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [insight/] [opcodes/] - Rev 1780

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1765 root 5583d 06h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1572 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc1'. 6857d 13h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1557 Fix most warnings issued by gcc4 nogj 6865d 20h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1554 fixed l.maci encoding phoenix 6883d 07h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 6996d 10h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1452 Implement a dynamic recompiler to speed up the execution nogj 7023d 13h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7023d 13h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7038d 16h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7073d 11h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1346 Remove the global op structure nogj 7086d 15h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7086d 15h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7086d 16h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1338 l.ff1 instruction added andreje 7102d 13h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1309 removed includes phoenix 7275d 09h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1308 Gyorgy Jeney: extensive cleanup phoenix 7278d 06h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7300d 06h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1286 Changed desciption of the l.cust5 insns lampret 7349d 09h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1285 Changed desciption of the l.cust5 insns lampret 7349d 09h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1169 Added support for l.addc instruction. csanchez 7662d 09h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1114 Added cvs log keywords lampret 7817d 01h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
1034 Fixed encoding for l.div/l.divu. lampret 7959d 02h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8024d 12h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
801 l.muli instruction added markom 8116d 16h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
722 floating point registers are obsolete; GPRs should be used instead markom 8144d 15h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
720 single floating point support added markom 8144d 19h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
717 some minor improvements markom 8144d 21h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
714 do_stats introduced for faster no-stats execution markom 8146d 17h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
709 eval_operands is now being generated markom 8149d 22h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
706 insn_decode execution part replaced by generated function decode_execute; use --enable-simple to use runtime decoding markom 8150d 15h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/
703 small optimizations to dissasemble markom 8151d 19h /or1k/tags/stable_0_2_0_rc1/insight/opcodes/

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