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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] - Rev 1530

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1530 Move the checking of the debug channel into the TRACE() macro nogj 6945d 16h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1529 * The effective address as written to the I/DCBPR registers needs to be translated by the respective mmu.
* Don't treat any values as special in the handling of DCPBR, DCBFR, DCBIR, ICBPR and ICBIR.		 nogj 6946d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1528 s/HAS_ISBLANK/HAVE_ISBLANK/ fix compileing on windows/cygwin. Reported by Kuoping Hsu and Girish Venkatar nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1527 Fix the execution log when an mtspr instruction causes an itlb miss nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1526 Fix a very outdated comment nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1525 Rename ADDR_PAGE to IADDR_PAGE nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1524 Check OR32_IF_DELAY instead of it_jump || it_branch nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1523 Bring config files up-to-date with recent changes nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1522 Add the cycles debug channel to print the value of the cycle counter before each line nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1521 Add {TRACE,ERR,FIXME,WARN}_ON macros to get the state of the given debug channel nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1520 Remove unused code nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1519 Add a usefull trace to the mc nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1518 Print a '\n' at the end of the trace nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1517 Use uint8_t instead of char nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1516 Make non-writeable memory writeable by the debug core nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1515 Use the new debug channel code instead of a compile time macro nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1514 Fix compileation with --enable-execution=simple nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1513 Remove the flag global nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1512 Fix compileing on windows (Reported my Kuoping Hsu and Girish Venkatar) nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1511 Fix typo nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1510 Create a seporate debug channel to dump exceptions to nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1509 Remove 08 prefix from PRIdREG nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1507 Use readline by default if it is availible nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.		 nogj 6947d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1505 Make output clearer nogj 6961d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1504 Use proper types nogj 6961d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1503 Move loopback handling out of uart_clock16 nogj 6961d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1502 Move interrupt handling out of uart_clock16 nogj 6961d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1501 Move RX logic out of uart_clock16 nogj 6961d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/

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