OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] - Rev 1566

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1566 Make the timer test emit the correct success protocol nogj 6867d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1565 Revert previous `fix' to accept the correct return code nogj 6867d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1564 Fix internal clock handling nogj 6867d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1563 Fix sending too many interrupts in the uart nogj 6867d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1562 Remove the no-longer used --enable-impl configure option nogj 6868d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1561 Fix segfault when parsing unknown config sections nogj 6868d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1560 Fix bug of not reporting timer interrupts when one was pending and a write happens to the ttmr spr that is not clearing the interrupt pending flag nogj 6868d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1559 Make the tick interrupt work when except_handle does not return nogj 6868d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1558 Fix a bug where the scheduler stack would underrun when a job was scheduled run in negative time nogj 6868d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1557 Fix most warnings issued by gcc4 nogj 6868d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1556 Create an 8-bit program load function to be able to load an unaligned section nogj 6868d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1555 * Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell.
* Changed code to use log2_int() instead of log2(), which is also a builtin
library function (fixes compile on gcc4).
* Moved is_power2() from sim-config.c to misc.c.
nogj 6868d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1554 fixed l.maci encoding phoenix 6886d 02h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1552 Update most config.guess and config.sub scripts. robertmh 6914d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1551 Remove the pcprev global nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1550 * prototype() -> prototype(void) where appropriate.
* Use `static' where it can be used.
nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1549 Spelling fixes nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1548 Print the useage of the -d in the help text nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1547 Use an array to keep track of the recompiled pages instead of a linked list nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1546 Only tell the user that we don't simulate a stalled cpu when it would actually
get stalled
nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1545 move sched_next_insn from sim-cmd.c to sched.c. It is also usefull for the pic and the tick timer nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1544 Print the exit code in decimal, like with the complex execution nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1543 Try to find a symbolic name of the location where we crashed nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1542 Print stackdump to stderr instead of stdout nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1541 Print the scheduler jobs when the sched_jobs debug channel has been specified nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1540 * Breakup the tick_job function into smaller ones.
* Fix lots of conner cases.
* Add tests for the tick timer.
nogj 6930d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1539 Speed up the dmmu nogj 6930d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1538 Speed up the immu nogj 6930d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1537 Remove old spr logging code. Use `-d +spr' to get spr access logged to stderr nogj 6930d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/
1532 Add pretty spr dumping code nogj 6934d 04h /or1k/tags/stable_0_2_0_rc1/or1ksim/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.