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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] - Rev 73

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73 Fixed all bugs. Now more or less works. IMMU still has some problems (exception start). lampret 8667d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
72 Added 'how to build GNU tools' lampret 8672d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/
69 Sim debug. lampret 8679d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
68 Added hook for l.sys 204. Changed SPR of flag (no more CCR) lampret 8679d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
67 Added simulator "application load". lampret 8679d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
66 Added another set of eval_ functions that should be used directly by simulator.
evalsim_ and setsim_ don't go through MMU transaltion mechanism.		 lampret 8679d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
65 Added DMMU stats. lampret 8679d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
64 SPR bit definition moved to spr_defs.h. lampret 8679d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
63 Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry
alignment of bits).		 lampret 8679d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
62 OR1K DMMU model. lampret 8679d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
60 Memory model changed. lampret 8714d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/
55 Added 'dv' command for dumping memory as verilog model. lampret 8730d 13h /or1k/tags/stable_0_2_0_rc1/or1ksim/
54 Regular maintenance. lampret 8730d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/
52 Comment character changed. lampret 8791d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/
51 Exception detection changed a bit. lampret 8791d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/
50 Added CURINSN macro. lampret 8791d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/
49 Changed simulation mode to non-virtual (real). lampret 8791d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/
48 Added CCR. lampret 8791d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/
47 Added interrupt recognition and better memory dump. lampret 8791d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/
46 Added srand(). lampret 8791d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/
45 Added NONE. lampret 8791d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/
44 %s bug fixed. lampret 8796d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
43 SUPV bit from SR is now saved into EPCR bit 0. lampret 8801d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/
42 Bug fix. Only symbols with names shorter than 9 characters are loaded. lampret 8801d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/
41 Bug fix. Now all COFF sections are loaded not just .text. lampret 8802d 16h /or1k/tags/stable_0_2_0_rc1/or1ksim/
38 Virtual machine at the moment. lampret 8802d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
37 STACK_SIZE is not properly used (will be removed soon). lampret 8802d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
36 Fixed bug when loading "data" from .text segment (all insns are not only
decoded but also placed in simulator memory undecoded as data).		 lampret 8802d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
35 SLP hooks. lampret 8802d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
34 Started with SLP (not finished yet). lampret 8802d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/

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