OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] - Rev 970

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
970 Testbench is now running on ORP architecture platform. simons 7984d 11h /or1k/tags/stable_0_2_0_rc1/or1ksim/
957 Flash at 0x04000000 RAM at 0x00000000. Only MMU test works. simons 7986d 12h /or1k/tags/stable_0_2_0_rc1/or1ksim/
956 Changed to work with or32-uclinux tool chain. Everything works except keyboard test. simons 7986d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/
954 some debugging code cleanup markom 7987d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
953 burst detection for bytes & halfwords added markom 7987d 22h /or1k/tags/stable_0_2_0_rc1/or1ksim/
941 memory optimizations moved into main optimization loop markom 7990d 20h /or1k/tags/stable_0_2_0_rc1/or1ksim/
940 profiling and cuc can be made in one run markom 7991d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/
939 caller saved register r11 fixed markom 7991d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/
938 conditional facts does not work for assignments outside BB markom 7992d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/
937 added file; cleanup markom 7992d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/
936 simple conditional facts generation tested markom 7992d 20h /or1k/tags/stable_0_2_0_rc1/or1ksim/
934 conditional facts generation markom 7993d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/
933 adding fact generation from conditionals; still under development markom 7993d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
932 adv. dead code elimination; few optimizations markom 7993d 22h /or1k/tags/stable_0_2_0_rc1/or1ksim/
931 more CMOV optimizations; some bugs fixed; more complex optimization structure markom 7994d 16h /or1k/tags/stable_0_2_0_rc1/or1ksim/
930 more CMOV optimizations; cse tested markom 7994d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/
929 add - sfxx optimization markom 7997d 20h /or1k/tags/stable_0_2_0_rc1/or1ksim/
928 sfor instruction replaced by conditional cmov markom 7997d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
927 problems with LRBB removal solved markom 7997d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
926 regs and loads do not use rst - can yield less logic markom 7998d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
925 new BB joining type; BBID_END added; virtex.tim sample cuc timings markom 7998d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/
924 bb joining, basic block triggers bugs fixed; more verilog generation of arbiter markom 7998d 22h /or1k/tags/stable_0_2_0_rc1/or1ksim/
919 stable release rherveille 7999d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/
918 sa command bug fixed markom 7999d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
917 optimize cmovs bug fixed markom 7999d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/
915 cuc main verilog file generation markom 8000d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/
914 SR[FO] is always set to 1. lampret 8000d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/
913 Executed log insns counter output in decimal instead of hex. lampret 8000d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/
912 Reset SR (and ESR) have TEE set to zero (no tick timer). lampret 8000d 23h /or1k/tags/stable_0_2_0_rc1/or1ksim/
911 Added instruction count to hardware executed log lampret 8001d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.