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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [cache/] - Rev 1358

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1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7067d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7076d 11h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7089d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1308 Gyorgy Jeney: extensive cleanup phoenix 7281d 05h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1249 Downgrading back to automake-1.4 lampret 7446d 05h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1117 Ignore generated files for CVS purposes sfurman 7789d 05h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1099 cvs bug fixed markom 7875d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
1085 Bug fixed. simons 7888d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
997 PRINTF should be used instead of printf; command redirection repaired markom 7977d 20h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
992 A bug when cache enabled and bus error comes fixed. simons 7979d 11h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
970 Testbench is now running on ORP architecture platform. simons 7985d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
884 code cleaning - a lot of global variables moved to runtime struct markom 8021d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
876 Beta release of ATA simulation rherveille 8029d 06h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
638 TLBTR CI bit is now working properly. simons 8180d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
631 Real cache access is simulated now. simons 8183d 06h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
626 store buffer added markom 8183d 19h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8204d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
517 some performance optimizations markom 8208d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
500 Added .cvsignore files for annoying generated files erez 8210d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
429 cache configuration added markom 8232d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
428 cache configuration added markom 8232d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8271d 19h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
247 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.		 jrydberg 8276d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8280d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8357d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
110 bug fix. markom 8435d 17h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8440d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
84 Update. lampret 8486d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
79 Data and instruction cache simulation added. lampret 8516d 07h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/
76 regular update lampret 8639d 21h /or1k/tags/stable_0_2_0_rc1/or1ksim/cache/

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