OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [support/] - Rev 1493

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1493 Make simprintf use the new debugging functions nogj 6976d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1492 Make the vapi use the new debugging functions nogj 6976d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1491 Make the dma peripheral use the new debugging functions nogj 6976d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1490 Make the mc peripheral use the new debugging functions nogj 6976d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1489 Make the gpio use the new debugging functions nogj 6976d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1488 Make the ata peripheral use the new debugging functions nogj 6976d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1487 Remove useless *breakpoint argument from the {set,eval}_direct* functions nogj 6976d 09h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1484 Use the {set,eval}_direct* functions where they are supposed to be used nogj 6987d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1463 Make the ethernet peripheral use the new debug channels nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1459 Add traces to the config file parsing routines nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1452 Implement a dynamic recompiler to speed up the execution nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1446 Cosmetic fixes nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1426 * Fix some warnings.
* Add some debugging messages.		 nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1416 Make the immu use the new debug functions nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1412 Make the dmmu use the new debug functions nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1408 Make the tick timer use the new debug functions nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1398 Correct incorrect calls to eval_direct8 nogj 7029d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1392 Make uart use the new trace functions nogj 7029d 02h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1390 * Change scheduler to count down to 0 instead of reaching a certain cycle
count.
* Change the SCHED_ADD interface to take a time out as the parameter instead of the number of cycles.		 nogj 7029d 02h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1389 Implement debug channels based on the wine debugging scheme nogj 7035d 05h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1376 aclocal && autoconf && automake phoenix 7063d 05h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1365 Pass a pointer as the user given argument in the schedular callback nogj 7069d 20h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7069d 20h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7079d 00h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7092d 03h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7195d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1315 missing declaration when defined STACK_ARGS phoenix 7213d 16h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1308 Gyorgy Jeney: extensive cleanup phoenix 7283d 18h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/
1265 simprintf now uses stack vargs -- same as printf markom 7399d 02h /or1k/tags/stable_0_2_0_rc1/or1ksim/support/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.