OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc2/] - Rev 166

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
166 Fixed RAM's oen bug. Cache bypass under development. lampret 8425d 12h /or1k/tags/stable_0_2_0_rc2/
165 Added variable ack of WB transfers (see NODELAY_WBx). lampret 8425d 12h /or1k/tags/stable_0_2_0_rc2/
164 *** empty log message *** lampret 8427d 14h /or1k/tags/stable_0_2_0_rc2/
163 Forgot files.f file. lampret 8427d 14h /or1k/tags/stable_0_2_0_rc2/
162 Benches (under development). lampret 8427d 14h /or1k/tags/stable_0_2_0_rc2/
161 Development version of RTL. Libraries are missing. lampret 8427d 14h /or1k/tags/stable_0_2_0_rc2/
160 simulation script lampret 8427d 14h /or1k/tags/stable_0_2_0_rc2/
159 synthesis scripts lampret 8427d 14h /or1k/tags/stable_0_2_0_rc2/
158 Initial RTEMS import chris 8437d 05h /or1k/tags/stable_0_2_0_rc2/
157 Update simons 8444d 08h /or1k/tags/stable_0_2_0_rc2/
156 File moved to opcode. simons 8444d 08h /or1k/tags/stable_0_2_0_rc2/
155 Update simons 8444d 08h /or1k/tags/stable_0_2_0_rc2/
154 Updated for new runtime environment chris 8450d 08h /or1k/tags/stable_0_2_0_rc2/
153 Writes to SPR_PC are now enabled chris 8450d 08h /or1k/tags/stable_0_2_0_rc2/
152 Breakpoint exceptions from single step are not printed now. chris 8450d 08h /or1k/tags/stable_0_2_0_rc2/
151 Typo in the previous commit. Sorry. chris 8450d 08h /or1k/tags/stable_0_2_0_rc2/
150 Fixed some single stepping issues chris 8450d 08h /or1k/tags/stable_0_2_0_rc2/
149 Fixed bug where disassemble command caused a segmentation fault chris 8451d 11h /or1k/tags/stable_0_2_0_rc2/
148 Replace single stepping patch that got overwritten chris 8451d 11h /or1k/tags/stable_0_2_0_rc2/
147 Initial checkin of instructions chris 8452d 03h /or1k/tags/stable_0_2_0_rc2/
146 Mofications to work with or1ksim JTAG based simulation chris 8452d 03h /or1k/tags/stable_0_2_0_rc2/
145 Modifications necessary for functional gdb debugging interface chris 8452d 03h /or1k/tags/stable_0_2_0_rc2/
144 Modifications necessary for functional gdb interface chris 8452d 03h /or1k/tags/stable_0_2_0_rc2/
143 Modifications necessary to work with JTAG or1ksim simulator chris 8452d 03h /or1k/tags/stable_0_2_0_rc2/
142 Modifications for a functional gdb environment chris 8452d 03h /or1k/tags/stable_0_2_0_rc2/
141 Added l_trap() chris 8452d 03h /or1k/tags/stable_0_2_0_rc2/
140 Modifications to work with or1ksim JTAG simulator chris 8452d 03h /or1k/tags/stable_0_2_0_rc2/
139 Modifications for functional gdb chris 8452d 03h /or1k/tags/stable_0_2_0_rc2/
138 - on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading
markom 8455d 06h /or1k/tags/stable_0_2_0_rc2/
137 Added TRAP exception chris 8456d 05h /or1k/tags/stable_0_2_0_rc2/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.