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[/] [or1k/] [tags/] [stable_0_2_0_rc2/] - Rev 795

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795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8143d 13h /or1k/tags/stable_0_2_0_rc2/
794 Added again just recently removed full_case directive lampret 8143d 13h /or1k/tags/stable_0_2_0_rc2/
793 Added synthesis off/on for timescale.v included file. lampret 8143d 13h /or1k/tags/stable_0_2_0_rc2/
792 Fixed port names that changed. lampret 8143d 13h /or1k/tags/stable_0_2_0_rc2/
791 Fixed some ports in instnatiations that were removed from the modules lampret 8143d 13h /or1k/tags/stable_0_2_0_rc2/
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8143d 13h /or1k/tags/stable_0_2_0_rc2/
789 Added response from memory controller (addr 0x60000000) lampret 8143d 14h /or1k/tags/stable_0_2_0_rc2/
788 Some of the warnings fixed. lampret 8143d 14h /or1k/tags/stable_0_2_0_rc2/
787 Added romfs.tgz lampret 8144d 08h /or1k/tags/stable_0_2_0_rc2/
786 Moved UCF constraint file to the backend directory. lampret 8144d 09h /or1k/tags/stable_0_2_0_rc2/
785 Added XSV specific documentation. lampret 8144d 09h /or1k/tags/stable_0_2_0_rc2/
784 Added soem missing files. lampret 8144d 09h /or1k/tags/stable_0_2_0_rc2/
783 Added sim directory and sub files/dirs. lampret 8144d 09h /or1k/tags/stable_0_2_0_rc2/
782 Added the old SW directory. It needs to be updated for the new ORP environment and test cases moved to sw directory. lampret 8144d 09h /or1k/tags/stable_0_2_0_rc2/
781 Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well. lampret 8144d 09h /or1k/tags/stable_0_2_0_rc2/
780 Added libraries. lampret 8144d 09h /or1k/tags/stable_0_2_0_rc2/
779 Added bench directory lampret 8144d 10h /or1k/tags/stable_0_2_0_rc2/
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8144d 10h /or1k/tags/stable_0_2_0_rc2/
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8144d 10h /or1k/tags/stable_0_2_0_rc2/
776 Updated defines. lampret 8144d 10h /or1k/tags/stable_0_2_0_rc2/
775 Optimized cache controller FSM. lampret 8144d 10h /or1k/tags/stable_0_2_0_rc2/
774 Removed old files. lampret 8144d 11h /or1k/tags/stable_0_2_0_rc2/
773 Changing directory structure ... lampret 8144d 11h /or1k/tags/stable_0_2_0_rc2/
772 Changing directory structure ... lampret 8144d 12h /or1k/tags/stable_0_2_0_rc2/
771 Added Makefile that is used to convert linux binary to loadable file for XSV board lampret 8145d 11h /or1k/tags/stable_0_2_0_rc2/
770 Maze application added. Mouse driver changed. simons 8146d 05h /or1k/tags/stable_0_2_0_rc2/
768 This commit was generated by cvs2svn to compensate for changes in r767,
which included commits to RCS files with non-trunk default branches.		 lampret 8146d 08h /or1k/tags/stable_0_2_0_rc2/
766 Color bits position changed. simons 8146d 13h /or1k/tags/stable_0_2_0_rc2/
765 Kernel source files changed to enable allocation of blocks sizes above 1M. simons 8146d 15h /or1k/tags/stable_0_2_0_rc2/
764 Some further changes. simons 8146d 16h /or1k/tags/stable_0_2_0_rc2/

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