OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc2/] - Rev 952

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
952 Added or1200_monitor top. lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
951 Updated file names lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
950 Removed nop.log. Added general.log and lookup.log. In the middle of moving test cases. lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
949 Added more WISHBONE protocol checks. Removed nop.log. Added general.log and lookup.log. lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
948 Fixed reference name lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
947 rty_i are unused - tied to zero. lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
946 Added SRAM_GENERIC lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
945 Changed logic when FLASH_GENERIC_REGISTERED lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
944 Added OR1200_WB_RETRY. Moved WB registered outsputs / samples inputs into lower section. lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
943 Added optional retry counter for wb_rty_i. Added graceful termination for aborted transfers. lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
942 Delayed external access at page crossing. lampret 8008d 01h /or1k/tags/stable_0_2_0_rc2/
941 memory optimizations moved into main optimization loop markom 8010d 18h /or1k/tags/stable_0_2_0_rc2/
940 profiling and cuc can be made in one run markom 8011d 16h /or1k/tags/stable_0_2_0_rc2/
939 caller saved register r11 fixed markom 8011d 21h /or1k/tags/stable_0_2_0_rc2/
938 conditional facts does not work for assignments outside BB markom 8011d 22h /or1k/tags/stable_0_2_0_rc2/
937 added file; cleanup markom 8011d 23h /or1k/tags/stable_0_2_0_rc2/
936 simple conditional facts generation tested markom 8012d 18h /or1k/tags/stable_0_2_0_rc2/
935 Defined sections, fixed boot sequence. ivang 8013d 05h /or1k/tags/stable_0_2_0_rc2/
934 conditional facts generation markom 8013d 16h /or1k/tags/stable_0_2_0_rc2/
933 adding fact generation from conditionals; still under development markom 8013d 19h /or1k/tags/stable_0_2_0_rc2/
932 adv. dead code elimination; few optimizations markom 8013d 20h /or1k/tags/stable_0_2_0_rc2/
931 more CMOV optimizations; some bugs fixed; more complex optimization structure markom 8014d 14h /or1k/tags/stable_0_2_0_rc2/
930 more CMOV optimizations; cse tested markom 8014d 16h /or1k/tags/stable_0_2_0_rc2/
929 add - sfxx optimization markom 8017d 18h /or1k/tags/stable_0_2_0_rc2/
928 sfor instruction replaced by conditional cmov markom 8017d 19h /or1k/tags/stable_0_2_0_rc2/
927 problems with LRBB removal solved markom 8017d 19h /or1k/tags/stable_0_2_0_rc2/
926 regs and loads do not use rst - can yield less logic markom 8018d 13h /or1k/tags/stable_0_2_0_rc2/
925 new BB joining type; BBID_END added; virtex.tim sample cuc timings markom 8018d 13h /or1k/tags/stable_0_2_0_rc2/
924 bb joining, basic block triggers bugs fixed; more verilog generation of arbiter markom 8018d 20h /or1k/tags/stable_0_2_0_rc2/
923 basic dos/fat service release rherveille 8019d 12h /or1k/tags/stable_0_2_0_rc2/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.