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[/] [or1k/] [tags/] [stable_0_2_0_rc3/] - Rev 1621

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Rev Log message Author Age Path
1621 First Impot jcastillo 6753d 09h /or1k/tags/stable_0_2_0_rc3/
1620 Added SMC91C111 LAN Chip Interruption to work with uClinux jcastillo 6758d 05h /or1k/tags/stable_0_2_0_rc3/
1619 Fixed types in function declaration jcastillo 6758d 10h /or1k/tags/stable_0_2_0_rc3/
1618 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6758d 17h /or1k/tags/stable_0_2_0_rc3/
1617 *** empty log message *** phoenix 6758d 17h /or1k/tags/stable_0_2_0_rc3/
1616 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6758d 17h /or1k/tags/stable_0_2_0_rc3/
1615 *** empty log message *** phoenix 6758d 17h /or1k/tags/stable_0_2_0_rc3/
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6768d 18h /or1k/tags/stable_0_2_0_rc3/
1613 change default phoenix 6774d 03h /or1k/tags/stable_0_2_0_rc3/
1612 major optimizations for or32 target phoenix 6774d 04h /or1k/tags/stable_0_2_0_rc3/
1610 Update ChangeLog nogj 6777d 05h /or1k/tags/stable_0_2_0_rc3/
1609 0.2.0-rc2 release nogj 6777d 05h /or1k/tags/stable_0_2_0_rc3/
1608 Avoid scheduleing too many jobs, potentially underflowing the scheduler stack nogj 6777d 23h /or1k/tags/stable_0_2_0_rc3/
1607 Don't drop cycles from the scheduler nogj 6777d 23h /or1k/tags/stable_0_2_0_rc3/
1606 fix uninitialized reads phoenix 6778d 04h /or1k/tags/stable_0_2_0_rc3/
1605 Execute l.ff1 instruction nogj 6785d 00h /or1k/tags/stable_0_2_0_rc3/
1604 Fix dumphex/dumpverilog to not do unaligned memory access nogj 6785d 00h /or1k/tags/stable_0_2_0_rc3/
1603 Accept EM_OPENRISC as a valid machine nogj 6786d 04h /or1k/tags/stable_0_2_0_rc3/
1602 Corrected description of l.sfXXui (arch manual had a wrong description compared to behavior implemented in or1ksim/gcc/or1200). Removed Atomicity chapter. lampret 6787d 02h /or1k/tags/stable_0_2_0_rc3/
1601 fixed description of l.sfXXXi lampret 6787d 03h /or1k/tags/stable_0_2_0_rc3/
1600 Corrected mistake in pin assignation due to typo error in RC203 manual jcastillo 6795d 04h /or1k/tags/stable_0_2_0_rc3/
1599 Corrected Syn Script to add MMU memories jcastillo 6795d 10h /or1k/tags/stable_0_2_0_rc3/
1598 Handle ethernet addresses as an address and not as an int nogj 6797d 01h /or1k/tags/stable_0_2_0_rc3/
1597 Fix parsing the destination register nogj 6797d 02h /or1k/tags/stable_0_2_0_rc3/
1596 Fix handling of eof in the sim cli nogj 6797d 02h /or1k/tags/stable_0_2_0_rc3/
1595 Add default immu/dmmu page size nogj 6797d 02h /or1k/tags/stable_0_2_0_rc3/
1594 Fix the case of is_power2(0) nogj 6797d 02h /or1k/tags/stable_0_2_0_rc3/
1593 Don't kill sim on second ctrl+c if the cli prompt has already been shown nogj 6797d 02h /or1k/tags/stable_0_2_0_rc3/
1592 Added additional desc of tick timer, added l.fl1, corrected desc of l.ff1 and corrected encoding of l.maci lampret 6799d 04h /or1k/tags/stable_0_2_0_rc3/
1591 Added l.fl1, fixed desc of l.ff1 lampret 6799d 23h /or1k/tags/stable_0_2_0_rc3/

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