Rev |
Log message |
Author |
Age |
Path |
221 |
major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup |
markom |
8330d 20h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
206 |
Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC. |
chris |
8357d 22h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
184 |
modified decode for trace debugging |
chris |
8379d 00h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
174 |
Few changes that should be done previously:
- machine.h replaced by spr_defs.h
- if reset label does not exist, boot from 0x0100 |
markom |
8399d 21h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
173 |
- profiler added, use e.g.:
make profiler
./sim -profile -fast executable
./profiler -g [-c]
(no special compiling options necessary) |
markom |
8402d 00h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
167 |
- SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed |
markom |
8407d 16h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
144 |
Modifications necessary for functional gdb interface |
chris |
8451d 19h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
142 |
Modifications for a functional gdb environment |
chris |
8451d 19h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
138 |
- on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading |
markom |
8454d 22h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
133 |
moved header files to match other utilities
repaired l.sra and some other shifting instructions
started build_automata for binary instruction decode |
markom |
8457d 20h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
129 |
Added code to inject insn from Debug Unit DIR |
chris |
8458d 19h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
123 |
Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault
Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files |
markom |
8464d 17h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
102 |
Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. |
lampret |
8490d 02h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
98 |
Return value register is now r9. |
lampret |
8505d 02h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
83 |
Updates. |
lampret |
8536d 17h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
77 |
Regular update. |
lampret |
8689d 23h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
68 |
Added hook for l.sys 204. Changed SPR of flag (no more CCR) |
lampret |
8708d 23h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
54 |
Regular maintenance. |
lampret |
8759d 23h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
20 |
or1k renamed to or32. |
lampret |
8869d 22h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
13 |
Rebuild of the generated files. |
jrydberg |
8930d 15h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
7 |
Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support. |
jrydberg |
8930d 15h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
6 |
Just a regular update with exception of cache simulation. MMU simulation still under development. |
lampret |
8931d 09h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |
3 |
This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches. |
cvs |
9057d 03h |
/or1k/tags/stable_0_2_0_rc3/or1ksim/cpu/or32/ |