OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [start/] [insight/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5586d 23h /or1k/tags/start/insight/
579 This commit was manufactured by cvs2svn to create tag 'start'. 8197d 11h /or1k/tags/start/insight/
578 Insight markom 8197d 11h /or1k/tags/start/insight/
577 info spr fixed markom 8198d 07h /or1k/tags/start/insight/
508 nop instruction now has immediate markom 8210d 09h /or1k/tags/start/insight/
497 Fixed encoding of the following insns: l.mac,l.msb,l.maci,l.mtspr,l.mfspr lampret 8222d 21h /or1k/tags/start/insight/
405 Stepping trough l.jal and l.jalr fixed. simons 8240d 12h /or1k/tags/start/insight/
404 is_delayed() is used outside this file. simons 8240d 12h /or1k/tags/start/insight/
403 Prompt changed because ddd requires (gdb). simons 8240d 12h /or1k/tags/start/insight/
397 removed or16 architecture markom 8246d 09h /or1k/tags/start/insight/
379 bug fixed. markom 8247d 12h /or1k/tags/start/insight/
375 Support for breakpoints changed. simons 8247d 23h /or1k/tags/start/insight/
374 *** empty log message *** simons 8248d 05h /or1k/tags/start/insight/
373 update after links markom 8248d 10h /or1k/tags/start/insight/
372 steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; added opcodes/or32.c; more detailed gdb l.trap handling markom 8248d 12h /or1k/tags/start/insight/
371 steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; decode.c moved to or32.c markom 8248d 12h /or1k/tags/start/insight/
364 info spr bug fixed markom 8253d 07h /or1k/tags/start/insight/
363 program can be stepped and continued before running it, supporting low level debugging markom 8253d 08h /or1k/tags/start/insight/
362 some changes based on current modifications to or1k; cleaner register naming; ctrl-c causes stepi; write&read pc work on next instruction markom 8253d 13h /or1k/tags/start/insight/
355 uart VAPI model improved; changes to MC and eth. markom 8254d 10h /or1k/tags/start/insight/
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8260d 10h /or1k/tags/start/insight/
263 configure for cpu; modified command line options markom 8272d 09h /or1k/tags/start/insight/
262 small bug in build_automata fixed; configure for memory markom 8272d 09h /or1k/tags/start/insight/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8281d 11h /or1k/tags/start/insight/
207 Several major changes to allow gdb to work with an Or1k implementation
that does not need a writeable PC. This version will use the breakpoint
vector and install a new vector into the EPC register, and then single
step out of the breakpoint exception. The breakpoint exception vector
must include only 2 commands: l.rfe and l.nop. Anything else and this
gdb version will fail w/ or1ksim.		 chris 8308d 13h /or1k/tags/start/insight/
174 Few changes that should be done previously:
- machine.h replaced by spr_defs.h
- if reset label does not exist, boot from 0x0100		 markom 8350d 12h /or1k/tags/start/insight/
151 Typo in the previous commit. Sorry. chris 8400d 15h /or1k/tags/start/insight/
150 Fixed some single stepping issues chris 8400d 15h /or1k/tags/start/insight/
149 Fixed bug where disassemble command caused a segmentation fault chris 8401d 17h /or1k/tags/start/insight/
146 Mofications to work with or1ksim JTAG based simulation chris 8402d 10h /or1k/tags/start/insight/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.