Rev |
Log message |
Author |
Age |
Path |
1152 |
*** empty log message *** |
phoenix |
7826d 20h |
/or1k/trunk/ |
1151 |
*** empty log message *** |
phoenix |
7826d 20h |
/or1k/trunk/ |
1150 |
remove unneded include |
phoenix |
7826d 22h |
/or1k/trunk/ |
1149 |
*** empty log message *** |
phoenix |
7827d 09h |
/or1k/trunk/ |
1148 |
*** empty log message *** |
phoenix |
7827d 09h |
/or1k/trunk/ |
1147 |
remove unneeded include |
phoenix |
7827d 09h |
/or1k/trunk/ |
1146 |
cygwin fix |
phoenix |
7827d 09h |
/or1k/trunk/ |
1145 |
1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine. |
sfurman |
7827d 10h |
/or1k/trunk/ |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7829d 16h |
/or1k/trunk/ |
1143 |
Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. |
sfurman |
7830d 06h |
/or1k/trunk/ |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7830d 06h |
/or1k/trunk/ |
1141 |
WB = 1/2 RISC clock test code enabled. |
lampret |
7831d 15h |
/or1k/trunk/ |
1140 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. |
lampret |
7831d 15h |
/or1k/trunk/ |
1139 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. |
lampret |
7831d 15h |
/or1k/trunk/ |
1138 |
Added some information how to run simulations. |
lampret |
7832d 11h |
/or1k/trunk/ |
1137 |
Added RFRAM generic and Altera lpm library. |
lampret |
7832d 11h |
/or1k/trunk/ |
1136 |
Add altera lpm library. |
lampret |
7832d 11h |
/or1k/trunk/ |
1135 |
Added get_gpr support for OR1200_RFRAM_GENERIC |
lampret |
7832d 11h |
/or1k/trunk/ |
1134 |
Changed location of debug test code to 0. |
lampret |
7832d 11h |
/or1k/trunk/ |
1133 |
Adding OR1200_CLMODE_1TO2 test code. |
lampret |
7832d 11h |
/or1k/trunk/ |
1132 |
RFRAM defines comments updated. Altera LPM option added. |
lampret |
7832d 11h |
/or1k/trunk/ |
1131 |
Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. |
lampret |
7832d 11h |
/or1k/trunk/ |
1130 |
RFRAM type always need to be defined. |
lampret |
7832d 11h |
/or1k/trunk/ |
1129 |
Added Altera LPM RAMs. Changed generic RAM output when OE inactive. |
lampret |
7832d 11h |
/or1k/trunk/ |
1128 |
Fixed my bustage: Add missing 2nd argument to open(). Otherwise,
opening a serial port channel can sporadically fail. |
sfurman |
7837d 10h |
/or1k/trunk/ |
1127 |
Added ability to map I/O from simulated UARTs to physical serial ports
on the host running the simulator. |
sfurman |
7840d 11h |
/or1k/trunk/ |
1126 |
Added lengthy comment explaining all possible choices for UART
channels, e.g. xterm, tcp, file, etc. |
sfurman |
7842d 13h |
/or1k/trunk/ |
1125 |
This test case passes. |
lampret |
7853d 17h |
/or1k/trunk/ |
1124 |
Initialize or1k_implementation with reasonable defaults for the number
of implementation registers. This doesn't affect the jtag or sim
targets at all because those values are always overwritten when
or1k_implementation is initialized. However, it is necessary when
connecting to remote gdb stubs through a serial port or socket, since
or1k_implementation is not yet initialized for those targets. |
sfurman |
7863d 08h |
/or1k/trunk/ |
1123 |
Renumber/rename SPRs to match latest architecture doc |
sfurman |
7864d 15h |
/or1k/trunk/ |