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[/] [or1k/] [trunk/] [gen_or1k_isa/] - Rev 1748

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1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.
jeremybennett 5738d 12h /or1k/trunk/gen_or1k_isa/
1672 Store instructions don't modify any register. Don't mark them as such in the
arch. definitions
nogj 6735d 10h /or1k/trunk/gen_or1k_isa/
1656 Pass the instruction operands as part of the op_queue structure. nogj 6735d 10h /or1k/trunk/gen_or1k_isa/
1605 Execute l.ff1 instruction nogj 6797d 11h /or1k/trunk/gen_or1k_isa/
1601 fixed description of l.sfXXXi lampret 6799d 14h /or1k/trunk/gen_or1k_isa/
1597 Fix parsing the destination register nogj 6809d 13h /or1k/trunk/gen_or1k_isa/
1591 Added l.fl1, fixed desc of l.ff1 lampret 6812d 10h /or1k/trunk/gen_or1k_isa/
1590 Added l.fl1 lampret 6812d 10h /or1k/trunk/gen_or1k_isa/
1557 Fix most warnings issued by gcc4 nogj 6871d 20h /or1k/trunk/gen_or1k_isa/
1554 fixed l.maci encoding phoenix 6889d 07h /or1k/trunk/gen_or1k_isa/
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 7002d 10h /or1k/trunk/gen_or1k_isa/
1452 Implement a dynamic recompiler to speed up the execution nogj 7029d 13h /or1k/trunk/gen_or1k_isa/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7029d 13h /or1k/trunk/gen_or1k_isa/
1385 Fix description of the l.mac/l.msb/l.maci instructions nogj 7044d 17h /or1k/trunk/gen_or1k_isa/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7044d 17h /or1k/trunk/gen_or1k_isa/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7079d 12h /or1k/trunk/gen_or1k_isa/
1346 Remove the global op structure nogj 7092d 15h /or1k/trunk/gen_or1k_isa/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7092d 16h /or1k/trunk/gen_or1k_isa/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7092d 16h /or1k/trunk/gen_or1k_isa/
1338 l.ff1 instruction added andreje 7108d 14h /or1k/trunk/gen_or1k_isa/
1309 removed includes phoenix 7281d 09h /or1k/trunk/gen_or1k_isa/
1308 Gyorgy Jeney: extensive cleanup phoenix 7284d 06h /or1k/trunk/gen_or1k_isa/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7306d 06h /or1k/trunk/gen_or1k_isa/
1286 Changed desciption of the l.cust5 insns lampret 7355d 09h /or1k/trunk/gen_or1k_isa/
1285 Changed desciption of the l.cust5 insns lampret 7355d 09h /or1k/trunk/gen_or1k_isa/
1169 Added support for l.addc instruction. csanchez 7668d 10h /or1k/trunk/gen_or1k_isa/
1114 Added cvs log keywords lampret 7823d 01h /or1k/trunk/gen_or1k_isa/
1113 Typos by Maria Bolado lampret 7823d 02h /or1k/trunk/gen_or1k_isa/
1111 Small fix for path of tth binary. lampret 7838d 08h /or1k/trunk/gen_or1k_isa/
1110 Re-generated. lampret 7838d 09h /or1k/trunk/gen_or1k_isa/

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