OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] [or1k_old/] [tags/] [nog_patch_64/] [gen_or1k_isa/] - Rev 1782

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1782 root 5515d 13h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1765 root 5626d 05h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1454 This commit was manufactured by cvs2svn to create tag 'nog_patch_64'. 7066d 11h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1452 Implement a dynamic recompiler to speed up the execution nogj 7066d 11h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7066d 11h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1385 Fix description of the l.mac/l.msb/l.maci instructions nogj 7081d 15h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7081d 15h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7116d 10h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1346 Remove the global op structure nogj 7129d 13h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7129d 14h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7129d 14h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1338 l.ff1 instruction added andreje 7145d 12h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1309 removed includes phoenix 7318d 07h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1308 Gyorgy Jeney: extensive cleanup phoenix 7321d 04h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7343d 04h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1286 Changed desciption of the l.cust5 insns lampret 7392d 08h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1285 Changed desciption of the l.cust5 insns lampret 7392d 08h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1169 Added support for l.addc instruction. csanchez 7705d 08h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1114 Added cvs log keywords lampret 7860d 00h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1113 Typos by Maria Bolado lampret 7860d 00h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1111 Small fix for path of tth binary. lampret 7875d 06h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1110 Re-generated. lampret 7875d 07h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1109 Temp files should rather not be in the cvs repository. lampret 7875d 07h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1108 Errors fixed. lampret 7875d 07h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1107 Updatded and improved formatting. lampret 7875d 07h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
1034 Fixed encoding for l.div/l.divu. lampret 8002d 01h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
955 typos and grammar fixed markom 8028d 12h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8067d 11h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
801 l.muli instruction added markom 8159d 14h /or1k_old/tags/nog_patch_64/gen_or1k_isa/
722 floating point registers are obsolete; GPRs should be used instead markom 8187d 14h /or1k_old/tags/nog_patch_64/gen_or1k_isa/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.