OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_11/] - Rev 106

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
106 Added limited WISHBONE B3 support for WISHBONE Slave Unit.
Doesn't support full speed bursts yet.		 mihad 7677d 18h /pci/tags/rel_11/
105 Wrong pci_bridge32.v file included in the project! mihad 7683d 01h /pci/tags/rel_11/
104 Found and simulated the problem in the synchronization logic.
Repaired the synchronization logic in the FIFOs.		 mihad 7683d 04h /pci/tags/rel_11/
103 Added test application and modified files to support it. mihad 7730d 01h /pci/tags/rel_11/
102 Cleanup! mihad 7730d 01h /pci/tags/rel_11/
101 Added simulation files. mihad 7730d 01h /pci/tags/rel_11/
100 Cleanup! mihad 7730d 01h /pci/tags/rel_11/
99 Cleanup! mihad 7730d 02h /pci/tags/rel_11/
98 Cleanup. mihad 7730d 02h /pci/tags/rel_11/
97 Doing a little bit of cleanup. mihad 7730d 02h /pci/tags/rel_11/
96 Update! mihad 7730d 02h /pci/tags/rel_11/
95 Removed this file, because it was too large - long download time. mihad 7730d 02h /pci/tags/rel_11/
94 Changed one critical PCI bus signal logic. mihad 7730d 02h /pci/tags/rel_11/
93 Added a test application! mihad 7730d 09h /pci/tags/rel_11/
92 Update! mihad 7730d 10h /pci/tags/rel_11/
91 WebPack 5.2 constraint file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7765d 23h /pci/tags/rel_11/
90 WebPack 5.2 project file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7765d 23h /pci/tags/rel_11/
89 Burst 2 error fixed. mihad 7802d 00h /pci/tags/rel_11/
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.		 mihad 7807d 23h /pci/tags/rel_11/
87 Updated acording to RTL changes. mihad 7819d 21h /pci/tags/rel_11/
86 Entered the option to disable no response counter in wb master. mihad 7819d 21h /pci/tags/rel_11/
85 Changed Vendor ID defines. mihad 7820d 01h /pci/tags/rel_11/
84 Changed vendor ID. mihad 7823d 19h /pci/tags/rel_11/
83 Cleaned up the code. No functional changes. mihad 7848d 18h /pci/tags/rel_11/
81 Updated synchronization in top level fifo modules. mihad 7862d 14h /pci/tags/rel_11/
79 Updated. mihad 7865d 19h /pci/tags/rel_11/
78 Old files with wrong names removed. mihad 7865d 19h /pci/tags/rel_11/
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7865d 19h /pci/tags/rel_11/
76 TRDY output delay was 10 instead of 11. Repaired. mihad 7868d 19h /pci/tags/rel_11/
75 Include statement moved out of off/on pragma as reported by Uwe. mihad 7871d 20h /pci/tags/rel_11/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.