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[/] [pci/] [tags/] [rel_12/] - Rev 57

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Rev Log message Author Age Path
57 Added completion expiration test for WB Slave unit. Changed expiration signalling mihad 7947d 17h /pci/tags/rel_12/
56 Number of state bits define was removed mihad 7948d 08h /pci/tags/rel_12/
55 Changed state machine encoding to true one-hot mihad 7948d 09h /pci/tags/rel_12/
54 Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim mihad 7981d 10h /pci/tags/rel_12/
53 Updated for synthesis purposes. Gate level simulation was failing in some configurations mihad 7981d 14h /pci/tags/rel_12/
52 Oops, never before noticed that OC header is missing mihad 7981d 18h /pci/tags/rel_12/
51 Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions. mihad 7981d 18h /pci/tags/rel_12/
50 Got rid of undef directives mihad 7984d 10h /pci/tags/rel_12/
49 Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives mihad 7984d 10h /pci/tags/rel_12/
48 Extracted distributed RAM module from wb/pci_tpram.v to its own file mihad 7984d 11h /pci/tags/rel_12/
47 Known issues repaired mihad 7984d 16h /pci/tags/rel_12/
46 Include statement was enclosed in synosys translate off/on directive - repaired mihad 7989d 11h /pci/tags/rel_12/
45 Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image mihad 7990d 16h /pci/tags/rel_12/
44 Added for testing of Configuration Cycles Type 1 mihad 7990d 17h /pci/tags/rel_12/
43 Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device mihad 7990d 17h /pci/tags/rel_12/
42 Removed out of date files mihad 8002d 17h /pci/tags/rel_12/
40 From these Wrod files PDF were created - added future improvements tadej 8081d 08h /pci/tags/rel_12/
39 File not needed tadej 8081d 09h /pci/tags/rel_12/
38 This file is not needed tadej 8081d 12h /pci/tags/rel_12/
37 These files are not needed any more tadej 8081d 12h /pci/tags/rel_12/
36 *** empty log message *** tadej 8081d 12h /pci/tags/rel_12/
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8135d 20h /pci/tags/rel_12/
34 Added missing include statements mihad 8150d 18h /pci/tags/rel_12/
33 Added some testcases, removed un-needed fifo signals mihad 8151d 15h /pci/tags/rel_12/
32 Added include statement that was missing and causing errors mihad 8159d 12h /pci/tags/rel_12/
31 User defined constants used for Test Application tadej 8162d 07h /pci/tags/rel_12/
30 Example of PCI testbench log file mihad 8162d 15h /pci/tags/rel_12/
29 Xilinx synthesys log file tadej 8162d 18h /pci/tags/rel_12/
28 pci/doc/pci_databook.pdf tadej 8163d 13h /pci/tags/rel_12/
27 Modified testbench and fixed some bugs mihad 8165d 10h /pci/tags/rel_12/

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