URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] [pci/] [tags/] [rel_3/] - Rev 60

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
60	Added support for Virtual Silicon two port RAM. Didn't run regression on it yet!	mihad	7974d 14h	/pci/tags/rel_3/
59	Added meta flop module for easier meta stable FF identification during synthesis	mihad	7974d 15h	/pci/tags/rel_3/
58	Removed all logic from asynchronous reset network	mihad	7979d 15h	/pci/tags/rel_3/
57	Added completion expiration test for WB Slave unit. Changed expiration signalling	mihad	7979d 21h	/pci/tags/rel_3/
56	Number of state bits define was removed	mihad	7980d 12h	/pci/tags/rel_3/
55	Changed state machine encoding to true one-hot	mihad	7980d 13h	/pci/tags/rel_3/
54	Changed Tsetup and Thold for WISHBONE models, due to difficulties encountered during gate level sim	mihad	8013d 14h	/pci/tags/rel_3/
53	Updated for synthesis purposes. Gate level simulation was failing in some configurations	mihad	8013d 18h	/pci/tags/rel_3/
52	Oops, never before noticed that OC header is missing	mihad	8013d 22h	/pci/tags/rel_3/
51	Fixed a bug and provided testcase for it. Target was responding to configuration cycle type 1 transactions.	mihad	8013d 22h	/pci/tags/rel_3/
50	Got rid of undef directives	mihad	8016d 14h	/pci/tags/rel_3/
49	Extracted distributed RAM module from wb/pci_tpram.v to its own file, got rid of undef directives	mihad	8016d 14h	/pci/tags/rel_3/
48	Extracted distributed RAM module from wb/pci_tpram.v to its own file	mihad	8016d 14h	/pci/tags/rel_3/
47	Known issues repaired	mihad	8016d 20h	/pci/tags/rel_3/
46	Include statement was enclosed in synosys translate off/on directive - repaired	mihad	8021d 14h	/pci/tags/rel_3/
45	Added a few testcases. Repaired wrong reset value for PCI_AM5 register. Repaired Parity Error Detected bit setting. Changed PCI_AM0 to always enabled(regardles of PCI_AM0 define), if image 0 is used as configuration image	mihad	8022d 20h	/pci/tags/rel_3/
44	Added for testing of Configuration Cycles Type 1	mihad	8022d 21h	/pci/tags/rel_3/
43	Removed - Interrupt acknowledge cycle now accepted by pci_behaviorial_device	mihad	8022d 21h	/pci/tags/rel_3/
42	Removed out of date files	mihad	8034d 21h	/pci/tags/rel_3/
40	From these Wrod files PDF were created - added future improvements	tadej	8113d 12h	/pci/tags/rel_3/
39	File not needed	tadej	8113d 12h	/pci/tags/rel_3/
38	This file is not needed	tadej	8113d 15h	/pci/tags/rel_3/
37	These files are not needed any more	tadej	8113d 15h	/pci/tags/rel_3/
36	* empty log message *	tadej	8113d 16h	/pci/tags/rel_3/
35	Files updated with missing includes, resolved some race conditions in test bench	mihad	8167d 23h	/pci/tags/rel_3/
34	Added missing include statements	mihad	8182d 22h	/pci/tags/rel_3/
33	Added some testcases, removed un-needed fifo signals	mihad	8183d 19h	/pci/tags/rel_3/
32	Added include statement that was missing and causing errors	mihad	8191d 16h	/pci/tags/rel_3/
31	User defined constants used for Test Application	tadej	8194d 11h	/pci/tags/rel_3/
30	Example of PCI testbench log file	mihad	8194d 19h	/pci/tags/rel_3/

Browse

Tools

Subversion Repositories pci

[/] [pci/] [tags/] [rel_3/] - Rev 60

Filtering Options