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[/] [pci/] [tags/] [rel_6/] - Rev 104

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Rev Log message Author Age Path
104 Found and simulated the problem in the synchronization logic.
Repaired the synchronization logic in the FIFOs.		 mihad 7644d 14h /pci/tags/rel_6/
103 Added test application and modified files to support it. mihad 7691d 11h /pci/tags/rel_6/
102 Cleanup! mihad 7691d 11h /pci/tags/rel_6/
101 Added simulation files. mihad 7691d 11h /pci/tags/rel_6/
100 Cleanup! mihad 7691d 11h /pci/tags/rel_6/
99 Cleanup! mihad 7691d 12h /pci/tags/rel_6/
98 Cleanup. mihad 7691d 12h /pci/tags/rel_6/
97 Doing a little bit of cleanup. mihad 7691d 12h /pci/tags/rel_6/
96 Update! mihad 7691d 12h /pci/tags/rel_6/
95 Removed this file, because it was too large - long download time. mihad 7691d 12h /pci/tags/rel_6/
94 Changed one critical PCI bus signal logic. mihad 7691d 12h /pci/tags/rel_6/
93 Added a test application! mihad 7691d 19h /pci/tags/rel_6/
92 Update! mihad 7691d 20h /pci/tags/rel_6/
91 WebPack 5.2 constraint file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7727d 10h /pci/tags/rel_6/
90 WebPack 5.2 project file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7727d 10h /pci/tags/rel_6/
89 Burst 2 error fixed. mihad 7763d 10h /pci/tags/rel_6/
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.		 mihad 7769d 09h /pci/tags/rel_6/
87 Updated acording to RTL changes. mihad 7781d 07h /pci/tags/rel_6/
86 Entered the option to disable no response counter in wb master. mihad 7781d 07h /pci/tags/rel_6/
85 Changed Vendor ID defines. mihad 7781d 11h /pci/tags/rel_6/
84 Changed vendor ID. mihad 7785d 05h /pci/tags/rel_6/
83 Cleaned up the code. No functional changes. mihad 7810d 04h /pci/tags/rel_6/
81 Updated synchronization in top level fifo modules. mihad 7824d 00h /pci/tags/rel_6/
79 Updated. mihad 7827d 05h /pci/tags/rel_6/
78 Old files with wrong names removed. mihad 7827d 06h /pci/tags/rel_6/
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7827d 06h /pci/tags/rel_6/
76 TRDY output delay was 10 instead of 11. Repaired. mihad 7830d 05h /pci/tags/rel_6/
75 Include statement moved out of off/on pragma as reported by Uwe. mihad 7833d 06h /pci/tags/rel_6/
73 Bug fixes, testcases added. mihad 7833d 06h /pci/tags/rel_6/
72 *** empty log message *** mihad 7880d 10h /pci/tags/rel_6/

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