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[/] [pci/] [tags/] [rel_7/] - Rev 39

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Rev Log message Author Age Path
39 File not needed tadej 8120d 14h /pci/tags/rel_7/
38 This file is not needed tadej 8120d 17h /pci/tags/rel_7/
37 These files are not needed any more tadej 8120d 17h /pci/tags/rel_7/
36 *** empty log message *** tadej 8120d 17h /pci/tags/rel_7/
35 Files updated with missing includes, resolved some race conditions in test bench mihad 8175d 01h /pci/tags/rel_7/
34 Added missing include statements mihad 8189d 23h /pci/tags/rel_7/
33 Added some testcases, removed un-needed fifo signals mihad 8190d 20h /pci/tags/rel_7/
32 Added include statement that was missing and causing errors mihad 8198d 17h /pci/tags/rel_7/
31 User defined constants used for Test Application tadej 8201d 12h /pci/tags/rel_7/
30 Example of PCI testbench log file mihad 8201d 20h /pci/tags/rel_7/
29 Xilinx synthesys log file tadej 8201d 23h /pci/tags/rel_7/
28 pci/doc/pci_databook.pdf tadej 8202d 18h /pci/tags/rel_7/
27 Modified testbench and fixed some bugs mihad 8204d 15h /pci/tags/rel_7/
26 Modified testbench and fixed some bugs mihad 8204d 16h /pci/tags/rel_7/
25 *** empty log message *** mihad 8222d 14h /pci/tags/rel_7/
24 *** empty log message *** mihad 8222d 15h /pci/tags/rel_7/
23 *** empty log message *** mihad 8222d 16h /pci/tags/rel_7/
22 Added short description for simulation running mihad 8222d 16h /pci/tags/rel_7/
21 Repaired a few bugs, updated specification, added test bench files and design document mihad 8222d 17h /pci/tags/rel_7/
20 *** empty log message *** mihad 8222d 17h /pci/tags/rel_7/
19 *** empty log message *** mihad 8222d 17h /pci/tags/rel_7/
18 *** empty log message *** mihad 8222d 18h /pci/tags/rel_7/
17 *** empty log message *** mihad 8222d 18h /pci/tags/rel_7/
16 Import of various scripts for simulation running mihad 8222d 18h /pci/tags/rel_7/
15 Initial testbench import. Still under development mihad 8222d 19h /pci/tags/rel_7/
14 *** empty log message *** mihad 8222d 19h /pci/tags/rel_7/
13 Added separate software directory to the project mihad 8222d 19h /pci/tags/rel_7/
12 PCI IP Core Introduction mihad 8224d 15h /pci/tags/rel_7/
11 Initial design document release mihad 8224d 15h /pci/tags/rel_7/
10 Updated descriptions, functional changes, added software obligations chapter mihad 8224d 15h /pci/tags/rel_7/

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