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[/] [pci/] [tags/] [rel_WB_B3/] [apps/] - Rev 154

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Rev Log message Author Age Path
154 New directory structure. root 5567d 17h /pci/tags/rel_WB_B3/apps/
121 This commit was manufactured by cvs2svn to create tag 'rel_WB_B3'. 7595d 04h /pci/tags/rel_WB_B3/apps/
105 Wrong pci_bridge32.v file included in the project! mihad 7618d 14h /pci/tags/rel_WB_B3/apps/
103 Added test application and modified files to support it. mihad 7665d 14h /pci/tags/rel_WB_B3/apps/
102 Cleanup! mihad 7665d 14h /pci/tags/rel_WB_B3/apps/
101 Added simulation files. mihad 7665d 14h /pci/tags/rel_WB_B3/apps/
100 Cleanup! mihad 7665d 14h /pci/tags/rel_WB_B3/apps/
99 Cleanup! mihad 7665d 15h /pci/tags/rel_WB_B3/apps/
98 Cleanup. mihad 7665d 15h /pci/tags/rel_WB_B3/apps/
97 Doing a little bit of cleanup. mihad 7665d 15h /pci/tags/rel_WB_B3/apps/
96 Update! mihad 7665d 15h /pci/tags/rel_WB_B3/apps/
93 Added a test application! mihad 7665d 22h /pci/tags/rel_WB_B3/apps/
91 WebPack 5.2 constraint file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7701d 12h /pci/tags/rel_WB_B3/apps/
90 WebPack 5.2 project file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7701d 12h /pci/tags/rel_WB_B3/apps/
85 Changed Vendor ID defines. mihad 7755d 14h /pci/tags/rel_WB_B3/apps/
84 Changed vendor ID. mihad 7759d 08h /pci/tags/rel_WB_B3/apps/
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 7801d 08h /pci/tags/rel_WB_B3/apps/
76 TRDY output delay was 10 instead of 11. Repaired. mihad 7804d 08h /pci/tags/rel_WB_B3/apps/
75 Include statement moved out of off/on pragma as reported by Uwe. mihad 7807d 09h /pci/tags/rel_WB_B3/apps/
59 Added meta flop module for easier meta stable FF identification during synthesis mihad 7920d 09h /pci/tags/rel_WB_B3/apps/
38 This file is not needed tadej 8059d 09h /pci/tags/rel_WB_B3/apps/
36 *** empty log message *** tadej 8059d 10h /pci/tags/rel_WB_B3/apps/
31 User defined constants used for Test Application tadej 8140d 05h /pci/tags/rel_WB_B3/apps/
29 Xilinx synthesys log file tadej 8140d 16h /pci/tags/rel_WB_B3/apps/
25 *** empty log message *** mihad 8161d 07h /pci/tags/rel_WB_B3/apps/
21 Repaired a few bugs, updated specification, added test bench files and design document mihad 8161d 10h /pci/tags/rel_WB_B3/apps/
14 *** empty log message *** mihad 8161d 12h /pci/tags/rel_WB_B3/apps/
5 Added .o file for kernel 2.4.3 mihad 8283d 08h /pci/tags/rel_WB_B3/apps/
3 New project directory structure mihad 8283d 09h /pci/tags/rel_WB_B3/apps/
2 New project directory structure mihad 8283d 10h /pci/tags/rel_WB_B3/apps/

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