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[/] [plasma/] [trunk/] [vhdl/] - Rev 437

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Rev	Log message	Author	Age	Path
429	Changed INIT bit length in RAM16X1D and RAM32X1D	rhoads	3992d 17h	/plasma/trunk/vhdl/
428	Fix mult bugs "0*-1" and "-5%12".	rhoads	4007d 22h	/plasma/trunk/vhdl/
404	Changed spacing	rhoads	4745d 14h	/plasma/trunk/vhdl/
403	Disable Ethernet and cache when simulating.	rhoads	4745d 14h	/plasma/trunk/vhdl/
397	Added RAM32X1D option	rhoads	4879d 07h	/plasma/trunk/vhdl/
391	Better fix for 0x8000000 * negative number	rhoads	5031d 13h	/plasma/trunk/vhdl/
390	Handle special case of signed mult of 0x80000000 and a negative number	rhoads	5034d 12h	/plasma/trunk/vhdl/
383	Permit up to 64KB internal RAM and updated cache code.	rhoads	5041d 13h	/plasma/trunk/vhdl/
377	Fix cache_we warning	rhoads	5184d 19h	/plasma/trunk/vhdl/
376	Add write_enable to sensitivity list for Altera	rhoads	5184d 21h	/plasma/trunk/vhdl/
374	Fixed comment	rhoads	5230d 10h	/plasma/trunk/vhdl/
371		rhoads	5379d 23h	/plasma/trunk/vhdl/
370	Fix "SLTIU v0, a0, -4000" by making imm signed	rhoads	5379d 23h	/plasma/trunk/vhdl/
369	Simplify E_RX_CLK usage	rhoads	5385d 11h	/plasma/trunk/vhdl/
365	Added UNISIM comment	rhoads	5443d 11h	/plasma/trunk/vhdl/
356	Added space to align text	rhoads	5495d 10h	/plasma/trunk/vhdl/
352		linus	5544d 03h	/plasma/trunk/vhdl/
350		root	5572d 23h	/plasma/trunk/vhdl/
348	Added comment for 32MB and 128MB DDR parts	rhoads	5603d 18h	/plasma/trunk/vhdl/
347	Xilinx ISE Project file	rhoads	5603d 18h	/plasma/trunk/vhdl/
346	Support optional 4KB cache	rhoads	5640d 18h	/plasma/trunk/vhdl/
345	Commented out optional mult speedup	rhoads	5644d 14h	/plasma/trunk/vhdl/
344	Fixed compiler warning	rhoads	5644d 14h	/plasma/trunk/vhdl/
343	Initial working cache	rhoads	5644d 15h	/plasma/trunk/vhdl/
337	Initial attempt at a cache	rhoads	5649d 19h	/plasma/trunk/vhdl/
335	Use enable signal for byte_we	rhoads	5691d 13h	/plasma/trunk/vhdl/
334	Short time for averaging read signal for 12.5 MHz case	rhoads	5701d 12h	/plasma/trunk/vhdl/
333	Updated Altera lpm_ram_dp usage for Cyclone FPGAs	rhoads	5701d 13h	/plasma/trunk/vhdl/
332	Updated Altera lpm_ram_dp	rhoads	5701d 13h	/plasma/trunk/vhdl/
331	Commented out unconnected signals	rhoads	5762d 13h	/plasma/trunk/vhdl/

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[/] [plasma/] [trunk/] [vhdl/] - Rev 437

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